Datasheet

ManualsBrandsANALOG DEVICES ManualsInterface ICsInterface IC - multiplexers TSSOP 20

Serially Controlled, ±15 V/+12 V/±5 V, 8-Channel/

4-Channel, iCMOS Multiplexers/Matrix Switches

ADG1438/ADG1439

Rev. A

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FEATURES

Serial interface up to 50 MHz

SDO daisy-chaining option

9.5 Ω on resistance @ 25°C

1.6 Ω on-resistance flatness

Fully specified at ±15 V/+12 V/±5 V

3 V logic-compatible inputs

Rail-to-rail operation

20-lead TSSOP and 20-lead, 4 mm × 4 mm LFCSP packages

APPLICATIONS

Relay replacement

Audio and video routing

Automatic test equipment

Data acquisition systems

Temperature measurement systems

Avionics

Battery-powered systems

Communication systems

Medical equipment

FUNCTIONAL BLOCK DIAGRAM

SCLK

SYNC

DIN

RESET

ADG1438

SDO

INPUT SHIFT

08496-001

S1A

S4A

SCLK

SYNC

DIN

RESET

ADG1439

SDO

INPUT SHIFT

S1B

S4B

08496-002

Figure 1. Figure 2.

GENERAL DESCRIPTION

The ADG1438 and ADG1439 are CMOS analog matrix switches

with a serially controlled 3-wire interface. The ADG1438 is an

8-channel matrix switch, and the ADG1439 is a dual 4-channel

matrix switch.

The ADG1438/ADG1439 use a versatile 3-wire serial interface

that operates at clock rates of up to 50 MHz and is compatible

with standard SPI, QSPI™, MICROWIRE™, and DSP interface

standards. The output of the shift register, SDO, enables a

number of the ADG1438/ADG1439 parts to be daisy-chained.

On power-up, the internal shift register contains all zeros, and

all switches are in the off state.

Each switch conducts equally well in both directions when on,

making these parts suitable for both multiplexing and demulti-

plexing applications. Because each switch is turned on or off by

a separate bit, these parts can also be configured as a type of

switch array, where any, all, or none of the eight switches can be

closed at any time. The input signal range extends to the supply

rails. All channels exhibit break-before-make switching action,

preventing momentary shorting when switching channels.

The ultralow on resistance and on-resistance flatness of these

switches make them ideal solutions for data acquisition and

gain switching applications where low distortion is critical.

iCMOS® construction ensures ultralow power dissipation,

making the parts ideally suited for portable and battery-

powered instruments.

PRODUCT HIGHLIGHTS

1. 50 MHz serial interface.

2. 9.5 Ω on resistance.

3. 1.6 Ω on-resistance flatness.

4. 3 V logic-compatible digital input, V

INH

= 2.0 V, V

INL

= 0.8 V.

Table 1. Related Devices

Part No. Description

ADG1408/ADG1409

Low on resistance, parallel

interface, 4-/8-channel ±15 V

multiplexers

Summary of content (20 pages)

PAGE 1
Serially Controlled, ±15 V/+12 V/±5 V, 8-Channel/ 4-Channel, iCMOS Multiplexers/Matrix Switches ADG1438/ADG1439 FEATURES FUNCTIONAL BLOCK DIAGRAM ADG1438 ADG1439 S1 S1A DA S4A D S1B DB S4B APPLICATIONS INPUT SHIFT REGISTER Relay replacement Audio and video routing Automatic test equipment Data acquisition systems Temperature measurement systems Avionics Battery-powered systems Communication systems Medical equipment INPUT SHIFT REGISTER SDO SCLK SYNC DIN RESET Figure 1.
PAGE 2
ADG1438/ADG1439 TABLE OF CONTENTS Features .............................................................................................. 1 Thermal Resistance .................................................................... 10 Applications ....................................................................................... 1 ESD Caution................................................................................ 10 Functional Block Diagram ......................................................
PAGE 3
ADG1438/ADG1439 SPECIFICATIONS ±15 V DUAL SUPPLY VDD = +15 V ± 10%, VSS = –15 V ± 10%, VL = 2.7 V to 5.5 V, GND = 0 V, unless otherwise noted. Table 2.
PAGE 4
ADG1438/ADG1439 Parameter −3 dB Bandwidth ADG1438 ADG1439 Insertion Loss CS (Off ) CD (Off ) ADG1438 ADG1439 CD, CS (On) ADG1438 ADG1439 POWER REQUIREMENTS IDD +25°C −40°C to +85°C −40°C to +125°C MHz typ MHz typ dB typ 9 pF typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 35. f = 1 MHz. 58 28 pF typ pF typ f = 1 MHz. f = 1 MHz. 286 139 pF typ pF typ f = 1 MHz. f = 1 MHz. VDD = +16.5 V, VSS = −16.5 V. Digital inputs = 0 V or VL. 0.001 0.3 1 IL Active – 30 MHz 0.26 IL Active – 50 MHz 0.
PAGE 5
ADG1438/ADG1439 12 V SINGLE SUPPLY VDD = 12 V ± 10%, VSS = 0 V, VL = 2.7 V to 5.5 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Match Between Channels (ΔRON) On-Resistance Flatness (RFLAT(ON)) +25°C −40°C to +85°C −40°C to +125°C Unit 0 to VDD V Ω typ 18 21.5 0.55 26 1.2 1.6 28.5 1.8 5 6 6.9 7.3 ±0.02 ±0.15 ±0.02 ±1 Drain Off Leakage, ID (Off ) ±0.25 ±0.25 ±0.05 ±0.3 ±3 ±1.
PAGE 6
ADG1438/ADG1439 −40°C to +85°C Parameter Insertion Loss +25°C 1.3 −40°C to +125°C CS (Off ) CD (Off ) ADG1438 ADG1439 CD, CS (On) ADG1438 ADG1439 POWER REQUIREMENTS IDD 14 pF typ Test Conditions/Comments RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 35. f = 1 MHz. 86 42 pF typ pF typ f = 1 MHz. f = 1 MHz. 295 145 pF typ pF typ f = 1 MHz. f = 1 MHz. VDD = 13.2 V. Digital inputs = 0 V or VL. 0.001 1 IL Inactive 0.3 1 IL Active – 30 MHz 0.26 IL Active – 50 MHz 0.42 ISS 0.001 0.3 0.
PAGE 7
ADG1438/ADG1439 ±5 V DUAL SUPPLY VDD = +5 V ± 10%, VSS = −5 V ± 10%, VL = 2.7 V to VDD, GND = 0 V, unless otherwise noted. Table 4. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On-Resistance Match Between Channels (ΔRON) On-Resistance Flatness (RFLAT(ON)) +25°C −40°C to +85°C −40°C to +125°C VSS to VDD 21 25 0.6 29 1.3 1.7 32 1.9 5.2 6.4 7.3 7.
PAGE 8
ADG1438/ADG1439 Parameter CD (Off ) ADG1438 ADG1439 CD, CS (On) ADG1438 ADG1439 POWER REQUIREMENTS IDD +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments 76 38 pF typ pF typ f = 1 MHz. f = 1 MHz. 311 151 pF typ pF typ f = 1 MHz. f = 1 MHz. VDD = +5.5 V, VSS = −5.5 V. Digital inputs = 0 V or VL. 0.001 1 IL Inactive 0.3 1 IL Active – 30 MHz IL Active – 50 MHz ISS 0.26 0.3 0.35 0.5 0.55 0.42 0.001 1 ±4.5/±16.
PAGE 9
ADG1438/ADG1439 TIMING CHARACTERISTICS All input signals are specified with tR = tF = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2 (see Figure 3). VDD = 4.5 V to 16.5 V; VSS = −16.5 V to 0 V; VL = 2.7 V to 5.5 V or VDD (whichever is less); GND = 0 V; all specifications TMIN to TMAX, unless otherwise noted. 1 Table 7.
PAGE 10
ADG1438/ADG1439 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 8. Parameter VDD to VSS VDD to GND VSS to GND VL to GND Analog Inputs 1 Digital Inputs1 Continuous Current, Sx or Dx Pins Peak Current, Sx or Dx Pins (Pulsed at 1 ms, 10% Duty Cycle Max) TSSOP LFCSP Operating Temperature Range Industrial (B Version) Storage Temperature Range Junction Temperature Reflow Soldering Peak Temperature (Pb-Free) Time at Peak Temperature 1 Rating 35 V −0.3 V to +25 V +0.3 V to −25 V −0.
PAGE 11
ADG1438/ADG1439 19 VL DIN 3 18 SDO ADG1438 GND 4 20 19 18 17 16 20 SYNC VDD 2 DIN GND S1 S2 S3 15 S5 S2 7 14 S6 S3 8 13 S7 S4 9 12 S8 D 10 11 NC NC = NO CONNECT PIN 1 INDICATOR ADG1438 TOP VIEW (Not to Scale) 15 RESET 14 VSS 13 S5 12 S6 11 S7 S4 NC D NC S8 S1 6 08496-005 NC 5 1 2 3 4 5 6 7 8 9 10 17 RESET TOP VIEW (Not to Scale) 16 VSS 08496-106 SCLK 1 VDD SCLK SYNC VL SDO PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NOTES 1. NC = NO CONNECT. 2.
PAGE 12
19 VL DIN 3 18 SDO ADG1439 20 19 18 17 16 20 SYNC VDD 2 DIN GND S1A S2A S3A 15 S1B S2A 7 14 S2B S3A 8 13 S3B S4A 9 12 S4B DA 10 11 DB NC = NO CONNECT ADG1439 TOP VIEW (Not to Scale) 15 14 13 12 11 RESET VSS S1B S2B S3B NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD TIED TO SUBSTRATE, VSS. 08496-107 NC 5 S1A 6 PIN 1 INDICATOR S4A 6 DA 7 NC 8 DB 9 S4B 10 17 RESET TOP VIEW (Not to Scale) 16 VSS GND 4 1 2 3 4 5 08496-108 SCLK 1 VDD SCLK SYNC VL SDO ADG1438/ADG1439 Figure 7.
PAGE 13
ADG1438/ADG1439 TYPICAL PERFORMANCE CHARACTERISTICS 16 18 VDD = +10V VSS = –10V VDD = +13.5V VSS = –13.5V 14 15 VDD = +12V VSS = –12V ON RESISTANCE (Ω) ON RESISTANCE (Ω) 12 10 8 6 VDD = +16.5V VSS = –16.5V VDD = +15V VSS = –15V 4 12 TA = +125°C TA = +85°C 9 TA = +25°C 6 TA = –40°C 3 2 –1.5 4.5 1.5 7.5 10.5 13.5 16.5 VS, VD (V) 0 –15 08496-006 0 –16.5 –13.5 –10.5 –7.5 –4.5 –5 0 5 10 15 VS, VD (V) Figure 9. On Resistance as a Function of VD (VS), Dual Supply Figure 12.
PAGE 14
ADG1438/ADG1439 500 1.0 VDD = +15V VSS = –15V VBIAS = +10V/–10V VL = 5.5V ID (OFF) –+ 0.5 400 IS (OFF) +– 0 IDD (µA) LEAKAGE CURRENT (nA) IDD PER LOGIC INPUT TA= 25°C ID, IS (ON) ++ IS (OFF) –+ –0.5 300 200 ID, IS (ON) – – –1.0 100 ID (OFF) +– 20 40 60 80 100 120 TEMPERATURE (°C) 08496-015 0 0 0 0.5 1.0 2.5 3.0 3.5 4.0 4.5 5.0 Figure 18. IDD vs. Logic Level 50 10 TA = 25°C VDD = +5V VSS = –5V VBIAS = +4.5V/–4.
PAGE 15
ADG1438/ADG1439 0 0 TA = 25°C VDD = +15V VSS = –15V –0.5 INSERTION LOSS (dB) OFF ISOLATION (dB) –20 –40 –60 –80 –1.0 TA = 25°C VDD = +15V VSS = –15V –1.5 –2.0 –2.5 –3.0 –100 1k 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) –4.0 08496-121 –120 1k 1M 10M 100M Figure 24. ADG1438 On Response vs. Frequency 0 0.20 TA = 25°C VDD = +15V VSS = –15V LOAD = 110Ω TA = 25°C 0.18 0.16 VDD = 5V, VSS = –5V, VS = 5V p-p 0.14 –40 THD + N (%) CROSSTALK (dB) 100k FREQUENCY (Hz) Figure 21.
PAGE 16
ADG1438/ADG1439 TEST CIRCUITS V A D A 08496-020 IDS VS VS VD Figure 27. On Resistance ID (ON) ID (OFF) S S NC NC = NO CONNECT Figure 28. Off Leakage VDD VSS VDD VSS SYNC D 50% 50% VS1 S2 TO S7 VS1 VS8 90% VOUT D GND RL 300Ω CL 35pF VOUT 90% tOFF * SIMILAR CONNECTION FOR ADG1439 08496-023 S8 tON Figure 30. Switching Times, tON/tOFF 3V VDD VSS VDD VSS SYNC S1 0V S2 TO S7 VS S8 80% ADG14381 80% OUTPUT D OUTPUT GND 100Ω tBBM 1SIMILAR CONNECTION FOR ADG1439.
PAGE 17
ADG1438/ADG1439 VDD VSS VDD VSS 3V SYNC ADG1438 1 RS VOUT S D VOUT ΔVOUT SWITCH OFF INPUT LOGIC GND VS SWITCH ON CL 1nF 08496-025 QINJ = CL × ΔVOUT 1SIMILAR CONNECTION FOR ADG1439. Figure 32. Charge Injection VSS VDD 0.1µF VSS 0.1µF 0.1µF VDD NETWORK ANALYZER VSS S VDD 50Ω 50Ω NETWORK ANALYZER VSS S 50Ω VS VS D RL 50Ω ADG1438 GND D VOUT VOUT VS 08496-027 GND OFF ISOLATION = 20 log INSERTION LOSS = 20 log Figure 33.
PAGE 18
ADG1438/ADG1439 TERMINOLOGY tBBM Off time measured between the 80% point of both switches when switching from one address state to another. RON Ohmic resistance between Terminal D and Terminal S. ΔRON Difference between the RON of any two channels. RFLAT(ON) Flatness that is defined as the difference between the maximum and minimum values of on resistance as measured over the specified analog signal range.. IS (Off) Source leakage current when the switch is off. VINL Maximum input voltage for Logic 0.
PAGE 19
ADG1438/ADG1439 THEORY OF OPERATION The ADG1438 and ADG1439 are serially controlled, 8-channel and dual 4-channel matrix switches, respectively. While providing the normal multiplexing and demultiplexing functions, these devices also provide the user with more flexibility as to where a signal can be routed. Each of the eight bits of the 8-bit write corresponds to one switch of the device. Logic 1 in a particular bit position turns the switch on, whereas Logic 0 turns the switch off.
PAGE 20
ADG1438/ADG1439 OUTLINE DIMENSIONS 6.60 6.50 6.40 20 11 4.50 4.40 4.30 6.40 BSC 1 10 PIN 1 0.65 BSC 1.20 MAX 0.15 0.05 0.30 0.19 COPLANARITY 0.10 0.20 0.09 0.75 0.60 0.45 8° 0° SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AC Figure 37. 20-Lead Thin Shrink Small Outline Package [TSSOP] (RU-20) Dimensions shown in millimeters 0.60 MAX 4.00 BSC SQ 0.60 MAX 15 PIN 1 INDICATOR 20 16 1 PIN 1 INDICATOR 3.75 BSC SQ 0.50 BSC 2.65 2.50 SQ 2.35 EXPOSED PAD (BOTTOM VIEW) 5 10 1.00 0.85 0.