Datasheet

ADG1433/ADG1434
Rev. C | Page 13 of 20
TEST CIRCUITS
I
DS
SD
V
S
V
06181-021
Figure 25. On Resistance
SD
I
S
(OFF) I
D
(OFF)
A A
V
V
DS
06181-022
Figure 26. Off Leakage
SD
I
D
(ON)
A
V
D
NC
NC = NO CONNECT
06181-023
Figure 27. On Leakage
IN
V
OUT
V
V
DD
SS
D
SA
V
DD
V
SS
GND
C
L
35pF
SB
V
S
V
IN
0.1µF0.1µF
V
IN
50%
50%
90%
50%
50%
90%
t
ON
t
OFF
R
L
100Ω
V
IN
V
OUT
06181-024
Figure 28. Switching Timing
IN
V
OUT
V
V
DD
SS
D
SA
V
DD
V
SS
GND
C
L
35pF
SB
V
S
V
IN
0.1µF0.1µF
R
L
100Ω
80%
V
OUT
V
IN
t
BBM
t
BBM
06181-025
Figure 29. Break-Before-Make Delay, t
D
EN
V
INx
V
DD
V
SS
DD
V
SS
ADG1433
GND
INx
S1B
S1A
V
IN
0.1µF0.1µF
INx
V
S
50% 50%
V
0V
ENABLE
DRIVE (V
IN
)
3V
0.9V
OUT
0.9V
OUT
t
ON
(EN)
OUT
0V
OUTPUT
V
OUT D1
C
L
35pF
t
OFF
(EN)
R
L
100Ω
50Ω
06181-026
Figure 30. Enable Delay, t
ON
(
EN
), t
OFF
(
EN
)