Datasheet

ADG1419
Rev. 0 | Page 12 of 16
TEST CIRCUITS
I
DS
SD
V
S
V
0
8485-021
Figure 22. On Resistance
SD
V
S
A A
V
D
I
S
(OFF) I
D
(OFF)
08485-022
Figure 23. Off Leakage
SD
A
V
D
I
D
(ON)
NC
NC = NO CONNECT
08485-023
Figure 24. On Leakage
IN
V
OUT
D
SA
V
DD
V
SS
V
DD
V
SS
GND
C
L
35pF
SB
V
IN
V
S
0.1µF0.1µF
R
L
300
50%
50%
90%
50%
50%
90%
t
ON
t
OFF
V
IN
V
OUT
V
IN
08485-024
Figure 25. Switching Times, t
ON
and t
OFF
IN
V
OUT
D
SA
V
DD
V
SS
V
DD
V
SS
GND
C
L
35pF
SB
V
IN
V
S
0.1µF0.1µF
R
L
300
80%
t
BBM
t
BBM
V
OUT
V
IN
08485-025
Figure 26. Break-Before-Make Time Delay
OUTPUT
ADG1419
INx
50
300
GND
SA
SB
D
35pF
V
IN
EN
V
DD
V
SS
V
DD
V
SS
V
S
3V
0V
OUTPUT
50% 50%
t
OFF
(EN)t
ON
(EN)
0.9V
O
0.9V
O
ENABLE
DRIVE (V
IN
)
0
8485-026
Figure 27. Enable Delay, t
ON
(EN), t
OFF
(EN)