Datasheet

Data Sheet ADG1414
Rev. A | Page 11 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
9
10
12
11
V
DD
DIN
GND
S2
D1
S1
SCLK
D2
S3
D4
S4
D3
20
21
22
23
24
19
18
17
16
15
14
13
RESET/V
L
SDO
V
SS
S7
D8
S8
D7
S6
D5
S5
D6
SYNC
ADG1414
TOP VIEW
(Not to Scale)
08497-004
Figure 4. TSSOP Pin Configuration
PIN 1
INDICATOR
1GND
2S1
3D1
4S2
5D2
6S3
15 S7
16 D8
17 S8
18 V
SS
14 D7
13 S6
7
D3
8
S4
9
D4
11
S5
12
D6
10
D5
21
SYNC
22
SCLK
23
V
DD
24
DIN
20
RESET/V
L
19
SDO
ADG1414
TOP VIEW
(Not to Scale)
NOTES
1. EXPOSED PAD TIED TO SUBSTRATE, V
SS
.
08497-005
Figure 5. LFCSP Pin Configuration
Table 9. Pin Function Descriptions
Pin No.
Mnemonic Description TSSOP LFCSP
1 22 SCLK Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial
clock input. Data can be transferred at rates of up to 50 MHz.
2
23
V
DD
Most Positive Power Supply Potential.
3 24 DIN Serial Data Input. This device has an 8-bit shift register. Data is clocked into the register on the
falling edge of the serial clock input.
4 1 GND Ground (0 V) Reference.
5 2 S1 Source Terminal 1. This pin can be an input or an output.
6 3 D1 Drain Terminal 1. This pin can be an input or an output.
7 4 S2 Source Terminal 2. This pin can be an input or an output.
8 5 D2 Drain Terminal 2. This pin can be an input or an output.
9 6 S3 Source Terminal 3. This pin can be an input or an output.
10 7 D3 Drain Terminal 3. This pin can be an input or an output.
11 8 S4 Source Terminal 4. This pin can be an input or an output.
12
9
D4
Drain Terminal 4. This pin can be an input or an output.
13 10 D5 Drain Terminal 5. This pin can be an input or an output.
14 11 S5 Source Terminal 5. This pin can be an input or an output.
15 12 D6 Drain Terminal 6. This pin can be an input or an output.
16 13 S6 Source Terminal 6. This pin can be an input or an output.
17 14 D7 Drain Terminal 7. This pin can be an input or an output.
18 15 S7 Source Terminal 7. This pin can be an input or an output.
19 16 D8 Drain Terminal 8. This pin can be an input or an output.
20 17 S8 Source Terminal 8. This pin can be an input or an output.
21 18 V
SS
Most Negative Power Supply Potential. In single-supply applications, it can be connected to
ground.
22
19
SDO
Serial Data Output. This pin can be used for daisy-chaining a number of these devices together or
for reading back the data in the shift register for diagnostic purposes. The serial data is transferred
on the rising edge of SCLK and is valid on the falling edge of the clock. Pull this open-drain output
to the supply with an external resistor.
23 20
RESET
/V
L
RESET
/Logic Power Supply Input (V
L
). Under normal operation, drive the
RESET
/V
L
pin with a 2.7 V
to 5 V supply. Pull the pin low (<0.8 V) for a short period of time (15 ns is sufficient) to complete a
hardware reset. All switches are opened, and the appropriate registers are cleared to 0. When
using the
RESET
/V
L
pin to complete a hardware reset, all other SPI pins (
SYNC
, SCLK, and DIN)
should be driven low.