Datasheet

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1 Ω On Resistance, ±15 V/+12 V/±5 V

iCMOS SPST Switches

ADG1401/ADG1402

Rev. 0

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FEATURES

1 Ω on resistance

0.2 Ω on resistance flatness

Up to 430 mA continuous current

Fully specified at +12 V, ±15 V, ±5 V

No V

supply required

3 V logic-compatible inputs

Rail-to-rail operation

8-lead MSOP and 8-lead, 3 mm × 2 mm LFCSP packages

APPLICATIONS

Automatic test equipment

Data acquisition systems

Battery-powered systems

Sample-and-hold systems

Audio signal routing

Video signal routing

Communication systems

Relay replacements

FUNCTIONAL BLOCK DIAGRAM

ADG1401

SWITCHES SHOWN FOR A LOGIC 1 INPUT

08486-001

Figure 1. ADG1401 Functional Block Diagram

ADG1402

SWITCHES SHOWN FOR A LOGIC 1 INPUT

08486-002

Figure 2. ADG1402 Functional Block Diagram

GENERAL DESCRIPTION

The ADG1401/ADG1402 contain a single-pole/single-throw

(SPST) switch. Figure 1 shows that with a logic input of 1, the

switch of the ADG1401 is closed and that of the ADG1402 is

open. Each switch conducts equally well in both directions when

on and has an input signal range that extends to the supplies. In

the off condition, signal levels up to the supplies are blocked.

The iCMOS® (industrial CMOS) modular manufacturing process

combines high voltage, complementary metal-oxide semiconductor

(CMOS) and bipolar technologies. It enables the development

of a wide range of high performance analog ICs capable of 33 V

operation in a footprint that no other generation of high voltage

parts has achieved. Unlike analog ICs using conventional CMOS

processes, iCMOS components can tolerate high supply voltages

while providing increased performance, dramatically lower

power consumption, and a reduced package size.

The on resistance profile is very flat over the full analog input

range ensuring excellent linearity and low distortion when

switching audio signals. The iCMOS construction ensures

ultralow power dissipation, making the part ideally suited for

portable and battery-powered instruments.

PRODUCT HIGHLIGHTS

1. 1.3 Ω maximum on resistance at 25°C.

2. Minimum distortion.

3. 3 V logic-compatible digital inputs: V

INH

= 2.0 V, V

INL

= 0.8 V.

4. No V

logic power supply required.

5. 8-lead MSOP and 8-lead, 3 mm × 2 mm LFCSP packages.

Summary of content (16 pages)

PAGE 1
Ω On Resistance, ±15 V/+12 V/±5 V iCMOS SPST Switches ADG1401/ADG1402 FEATURES FUNCTIONAL BLOCK DIAGRAM 1 Ω on resistance 0.2 Ω on resistance flatness Up to 430 mA continuous current Fully specified at +12 V, ±15 V, ±5 V No VL supply required 3 V logic-compatible inputs Rail-to-rail operation 8-lead MSOP and 8-lead, 3 mm × 2 mm LFCSP packages ADG1401 D S SWITCHES SHOWN FOR A LOGIC 1 INPUT 08486-001 IN Figure 1.
PAGE 2
ADG1401/ADG1402 TABLE OF CONTENTS Features .............................................................................................. 1 Continuous Current Per Channel, S or D ..................................6 Applications ....................................................................................... 1 Absolute Maximum Ratings ............................................................7 Functional Block Diagram ..............................................................
PAGE 3
ADG1401/ADG1402 SPECIFICATIONS ±15 V DUAL SUPPLY VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C −40°C to +85°C −40°C to +125°C VDD to VSS 1 1.3 0.2 0.23 ±0.05 ±0.4 ±0.
PAGE 4
ADG1401/ADG1402 +12 V SINGLE SUPPLY VDD = +12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25°C −40°C to +85°C −40°C to +125°C 0 V to VDD 2 2.4 0.6 0.68 ±0.05 ±0.4 ±0.05 ±0.4 ±0.2 ±1 2.9 3.
PAGE 5
ADG1401/ADG1402 ±5 V DUAL SUPPLY VDD = +5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Flatness, RFLAT (ON) 25°C −40°C to +85°C −40°C to +125°C 0 V to VDD 2.3 2.7 0.65 0.72 3.3 3.7 0.85 0.9 Unit Test Conditions/Comments V Ω typ Ω max Ω typ Ω max VS = ±4.5 V, IS = −10 mA; see Figure 20 VDD = +4.5 V, VSS = −4.5 V VS = ±4.5 V, IS = −10 mA LEAKAGE CURRENTS Source Off Leakage, IS (Off ) ±0.
PAGE 6
ADG1401/ADG1402 CONTINUOUS CURRENT PER CHANNEL, S OR D Table 4. Parameter CONTINUOUS CURRENT, S or D 1 ±15 V Dual Supply 8-Lead MSOP (θJA = 206°C/W) 8-Lead LFCSP (θJA = 50.8°C/W) +12 V Single Supply 8-Lead MSOP (θJA = 206°C/W) 8-Lead LFCSP (θJA = 50.8°C/W) ±5 V Dual Supply 8-Lead MSOP (θJA = 206°C/W) 8-Lead LFCSP (θJA = 50.
PAGE 7
ADG1401/ADG1402 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. THERMAL RESISTANCE Table 5. Table 6. Thermal Resistance Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs1 1 Digital Inputs Peak Current, S or D (Pulsed at 1 ms, 10% Duty-Cycle Maximum) 8-Lead MSOP (4-Layer Board) 8-Lead LFCSP Continuous Current per Channel, S or D Operating Temperature Range Industrial Storage Temperature Range Junction Temperature Reflow Soldering Peak Temperature, Pb Free 1 Rating 35 V −0.
PAGE 8
ADG1401/ADG1402 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADG1401/ ADG1402 GND 3 TOP VIEW (Not to Scale) VDD 4 8 D 7 VSS 6 IN 5 NC NOTES 1. EXPOSED PAD TIED TO SUBSTRATE, VSS. 2. NC = NO CONNECT. 08486-003 S 1 NC 2 Figure 3. ADG1401/ADG1402 Pin Configuration Table 7. ADG1401/ADG1402 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic S NC GND VDD NC IN VSS D EPAD Description Source Terminal. This pin can be an input or output. No Connect. Ground (0 V) Reference.
PAGE 9
ADG1401/ADG1402 TYPICAL PERFORMANCE CHARACTERISTICS 1.5 1.4 VDD = +12V VSS = –12V 1.6 1.3 VDD = +13.5V VSS = –13.5V 1.4 1.2 VDD = +15V VSS = –15V 1.8 ON RESISTANCE (Ω) ON RESISTANCE (Ω) 2.0 VDD = +10V VSS = –10V TA = 25°C 1.1 1.0 0.9 0.8 –11.5 –6.5 –1.5 3.5 8.5 TA = +25°C 0.8 TA = –40°C 0.6 0.2 VDD = +15V VSS = –15V 0 –15 –10 08486-016 0.6 –16.5 TA = +85°C 1.0 0.4 VDD = +16.5V VSS = –16.5V 0.7 TA = +125°C 1.2 13.5 VS, VD (V) –5 0 5 10 15 VS, VD (V) Figure 4.
PAGE 10
ADG1401/ADG1402 90 80 IDD PER CHANNEL TA = 25°C 80 70 60 60 50 50 40 IDD (µA) IS (OFF) – + ID (OFF) + – IS (OFF) – + ID (OFF) + – ID, IS (ON) + + ID, IS (ON) – – 30 20 40 VDD = +15V VSS = –15V VDD = 12V VSS = 0V 30 20 10 VDD = +5V VSS = –5V 10 0 0 0 20 40 60 80 100 120 TEMPERATURE (°C) –10 08486-028 –10 0 2 4 6 8 10 12 08486-018 LEAKAGE CURRENT (nA) VDD = +15V VSS = –15V 70 VBIAS = ±10V 14 LOGIC LEVEL, IN (V) Figure 10.
PAGE 11
ADG1401/ADG1402 0 0.030 TA = 25°C VDD = +15V VSS = –15V –20 0.025 –40 0.020 RL = 110Ω TA = 25°C 0.015 –80 0.010 –100 0.005 –120 1k 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) VDD = 15V, VSS = 15V, VS = 10V p-p 0 0 10k 15k 20k FREQUENCY (Hz) Figure 16. Off Isolation vs. Frequency Figure 18. THD + N vs. Frequency 0 0 TA = 25°C –10 VDD = +15V VSS = –15V TA = 25°C VDD = +15V VSS = –15V –0.5 –20 –1.0 NO DECOUPLING CAPACITORS ACPSRR (dB) –30 –1.5 –2.
PAGE 12
ADG1401/ADG1402 TEST CIRCUITS V S ID (ON) D NC S D A 08486-019 VS NC = NO CONNECT Figure 20. On Resistance ID (OFF) S A Figure 22. On Leakage D A VS 08486-020 IS (OFF) VD Figure 21. Off Leakage VDD VSS 0.1µF VDD VSS S VS VIN ADG1401 50% 50% VIN ADG1402 50% 50% VOUT D CL 35pF RL 300Ω IN 90% VOUT 90% GND tOFF tON 08486-022 0.1µF Figure 23.
PAGE 13
ADG1401/ADG1402 VDD VDD VSS 0.1µF 0.1µF VDD VSS 0.1µF 0.1µF AUDIO PRECISION NETWORK ANALYZER VSS VDD VSS RS S 50Ω IN S 50Ω IN VS D GND VOUT VIN GND OFF ISOLATION = 20 LOG VOUT VS Figure 25. Off Isolation VDD Figure 27. THD + N VSS 0.1µF VDD NETWORK ANALYZER VSS S 50Ω IN VS D RL 50Ω GND INSERTION LOSS = 20 LOG VOUT VOUT WITH SWITCH VOUT WITHOUT SWITCH 08486-025 VIN RL 10kΩ Figure 26. Bandwidth Rev. 0 | Page 13 of 16 VOUT 08486-026 RL 50Ω 08486-024 VIN 0.
PAGE 14
ADG1401/ADG1402 TERMINOLOGY IDD The positive supply current. CD, CS (On) ISS The negative supply current. CIN The digital input capacitance. VD (VS) The analog voltage on Terminal D and Terminal S. tON Delay time between the 50% and 90% points of the digital input and switch on condition. See Figure 23. The on switch capacitance, measured with reference to ground. RON The ohmic resistance between Terminal D and Terminal S.
PAGE 15
ADG1401/ADG1402 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 5.15 4.90 4.65 5 1 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 6° 0° 0.40 0.25 0.80 0.55 0.40 0.23 0.09 100709-B 0.15 0.05 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 28. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 1.75 1.65 1.50 2.00 BSC 5 3.00 BSC 8 1.90 1.80 1.65 EXPOSED PAD 0.20 MIN 4 INDEX AREA 0.50 0.40 0.30 TOP VIEW 0.80 0.75 0.70 0.