Datasheet

ADG1204
Rev. B | Page 12 of 16
TEST CIRCUITS
I
DS
SD
V
S
04779-020
V
SD
V
S
A A
V
D
I
S
(OFF) I
D
(OFF)
04779-021
SD
A
V
D
I
D
(ON)
NC
NC = NO CONNECT
04779-022
Figure 21. On Resistance Figure 22. Off Leakage Figure 23. On Leakage
V
S
S1
D
GND
C
L
35pF
R
L
300Ω
V
OUT
50% 50%
90%
90%
ADDRESS
DRIVE (V
IN
)
)
V
OUT
A0
A1
S4
S3
S2
V
S1
V
S4
EN
2.4V
0V
3V
t
TRANSITION
t
TRANSITION
V
DD
0.1µF
V
SS
V
DD
V
SS
0.1µF
04779-023
Figure 24. Address to Output Switching Times
ADDRESS
DRIVE (V
IN
)
V
OUT
V
S
S1
D
GND
C
L
35pF
R
L
300Ω
50Ω
V
OUT
A0
A1
S4
S3
S2
V
S1
EN
2.4V
V
DD
0.1µF
V
SS
V
DD
V
SS
0.1µF
04779-024
t
BBM
80%
80%
0V
3V
Figure 25. Break-Before-Make Time Delay
ENABLE
DRIVE (V
IN
)
S1
D
GND
C
L
35pF
R
L
300Ω
V
OUT
A0
A1
S4
S3
S2
V
S
EN
V
DD
0.1µF
V
SS
V
DD
V
SS
0.1µF
V
S
50Ω
04779-025
t
OFF
(EN)
t
ON
(EN)
50% 50%
0.9V
O
0.9V
O
OUTPUT
0V
3V
V
O
0V
Figure 26. Enable-to-Output Switching Delay