Datasheet

Data Sheet ADF4360-9
Rev. C | Page 5 of 24
TIMING CHARACTERISTICS
1
AV
DD
= DV
DD
= V
VCO
= 3.3 V ± 10%; AGND = DGND = 0 V; 1.8 V and 3 V logic levels used; T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter Limit at T
MIN
to T
MAX
(B Version) Unit Test Conditions/Comments
t
1
20 ns min LE setup time
t
2
10 ns min DATA to CLK setup time
t
3
10 ns min DATA to CLK hold time
t
4
25 ns min CLK high duration
t
5
25 ns min CLK low duration
t
6
10
ns min
CLK to LE setup time
t
7
20 ns min LE pulse width
1
Refer to the Power-Up section for the recommended power-up procedure for this device.
CLK
D
ATA
LE
LE
DB23 (MSB)
DB22
DB2
DB1
(CONTRO
L
BIT C2)
DB0 (LSB)
(CONTRO
L
BIT C1)
t
1
t
2
t
3
t
7
t
6
t
4
t
5
07139-002
Figure 2. Timing Diagram