Datasheet

ADF4360-9 Data Sheet
Rev. C | Page 14 of 24
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11
DB10 DB9 DB8 DB7 DB6
DB5 DB4 DB3 DB2 DB1 DB0
C2 (0) C1 (0)
PC1PC2CRD1D2PDPCPCPGMTLDPL1PL2CPI1CPI2CPI3CPI4CPI5CPI6PD1 D3
CONTROL
BITS
DIVOUT
CONTROL
CURRENT
SETTING 2
CURRENT
SETTING 1
CORE
POWER
LEVEL
OUTPUT
POWER
LEVEL
DB21
DB22DB23
POWER-
DOWN 2
POWER-
DOWN 1
COUNTER
RESET
MUTE-TILL-
LD
RESERVED RESERVED
CP GAIN
CP
THREE-
STATE
PHASE
DETECTOR
POLARITY
PD2RSVRSV
CR
0
1
COUNTER
OPERATION
NORMAL
R, A, B COUNTERS
HELD IN RESET
PC2
0
0
1
0
CORE POWER LEVEL
2.5mA
5mA (RECOMMENDED)
7.5mA
PC1
0
1
1 1
10mA
CP
0
1
CHARGE PUMP
OUTPUT
NORMAL
THREE-STATE
PDP
0
1
PHASE DETECTOR
POLARITY
NEGATIVE
POSITIVE
CPG
0
1
CP GAIN
CURRENT SETTING 1
CURRENT SETTING 2
MTLD
0
1
MUTE-TIL-LOCK DETECT
DISABLED
ENABLED
D3 D2 D1
MUXOUT
DV
DD
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
DIGITAL LOCK DETECT
(ACTIVE HIGH)
N DIVIDER OUTPUT
DV
DD
R DIVIDER OUTPUT
A CNTR/2 OUT
A CNTR OUT
DGND
CE PIN PD2 PD1 MODE
0 X X ASYNCHRONOUS POWER-DOWN
1 X 0 NORMAL OPERATION
1 0 1 ASYNCHRONOUS POWER-DOWN
1 1 1 SYNCHRONOUS POWER-DOWN
CPI6 CPI5 CPI4
I
CP
(mA)
CPI3 CPI2 CPI1 4.7kΩ
0.31
0.62
0.93
1.25
1.56
1.87
2.18
2.50
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
PL2 PL1 OUTPUT POWER LEVEL
CURRENT USING TUNED LOAD
–9dBm
–6dBm
–3dBm
0dBm
USING 50Ω TO V
VCO
–19dBm
–15dBm
–12dBm
–9dBm
0
0
1
1
0
1
0
1
3.5mA
5.0mA
7.5mA
11.0mA
07139-022
THESE BITS ARE
NOT USED BY THE
DEVICE AND ARE
DON'T CARE BITS.
Figure 23. Control Latch