Datasheet

ADF4360-8
Rev. A | Page 13 of 24
LATCH STRUCTURE
Table 6 shows the three on-chip latches for the ADF4360 family. The two LSBs decide which latch is programmed.
Table 6. Latch Structure
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
C2 (0) C1 (0)
PC1PC2CRM1M2PDPCPCPGMTLDPL1PL2CPI1CPI2CPI3CPI4CPI5CPI6PD1 M3
CONTROL
BITS
MUXOUT
CONTROL
CURRENT
SETTING 2
CURRENT
SETTING 1
CORE
POWER
LEVEL
OUTPUT
POWER
LEVEL
DB21DB22DB23
POWER-
DOWN 2
RESERVED RESERVED
RESERVED RESERVED
POWER-
DOWN 1
COUNTER
RESET
MUTE-TIL-
LD
CP GAIN
CP
THREE-
STATE
PHASE
DETECTOR
POLARITY
PD2RSVRSV
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
C2 (0) C1 (1)
R1R2R3R4R5R7R8R9R10R11R12R13R14ABP1ABP2LDPTMBBSC1 R6
CONTROL
BITS
BAND
SELECT
CLOCK
ANTI-
BACKLASH
PULSE
WIDTH
14-BIT REFERENCE COUNTER
DB21DB22DB23
LOCK
DETECT
PRECISION
TEST
MODE
BIT
RESERVED RESERVED
BSC2RSVRSV
RSVRSV
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
C2 (1) C1 (0)
RSVRSVRSVRSVRSVB1B2B3B4B5B6B7B8B9B10B11B12B13 RSV
CONTROL
BITS
RESERVED
13-BIT B COUNTER
CONTROL LATCH
N COUNTER LATCH
R COUNTER LATCH
DB21DB22DB23
CP GAIN
CPG
04763-021