Datasheet

Data Sheet ADF4360-2
Rev. C | Page 3 of 24
SPECIFICATIONS
1
AV
DD
= DV
DD
= V
VCO
= 3.3 V ± 10%; AGND = DGND = 0 V; T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
Parameter B Version Unit Conditions/Comments
REF
IN
CHARACTERISTICS
REF
IN
Input Frequency 10/250 MHz min/max
For f < 10 MHz, use a CMOS-compatible
square wave, slew rate > 21 V/µs
REF
IN
Input Sensitivity 0.7/AV
DD
V p-p min/max AC-coupled
0 to AV
DD
V max CMOS-compatible
REF
IN
Input Capacitance 5.0 pF max
REF
IN
Input Current
±100
µA max
PHASE DETECTOR
Phase Detector Frequency
2
8 MHz max
CHARGE PUMP
I
CP
Sink/Source
3
With R
SET
= 4.7 kΩ
High Value 2.5 mA typ
Low Value
0.312
mA typ
R
SET
Range 2.7/10 kΩ
I
CP
Three-State Leakage Current 0.2 nA typ
Sink and Source Current Matching 2 % typ 1.25 V ≤ V
CP
≤ 2.5 V
I
CP
vs. V
CP
1.5 % typ 1.25 V ≤ V
CP
≤ 2.5 V
I
CP
vs. Temperature
2
% typ
V
CP
= 2.0 V
LOGIC INPUTS
V
INH
, Input High Voltage 1.5 V min
V
INL
, Input Low Voltage
0.6
V max
I
INH
/I
INL
, Input Current ±1 µA max
C
IN
, Input Capacitance 3.0 pF max
LOGIC OUTPUTS
V
OH
, Output High Voltage DV
DD
− 0.4 V min CMOS output chosen
I
OH
, Output High Current 500 µA max
V
OL
, Output Low Voltage 0.4 V max I
OL
= 500 µA
POWER SUPPLIES
AV
DD
3.0/3.6 V min/V max
DV
DD
AV
DD
V
VCO
AV
DD
AI
DD
4
10 mA typ
DI
DD
4
2.5 mA typ
I
VCO
4, 5
24.0 mA typ I
CORE
= 15 mA
I
VCO
4, 5
29.0 mA typ I
CORE
= 20 mA
I
RFOUT
4
3.5 to 11.0 mA typ RF output stage is programmable
Low Power Sleep Mode
4
7 µA typ