Datasheet

Data Sheet ADF4351
Rev. 0 | Page 3 of 28
SPECIFICATIONS
AV
DD
= DV
DD
= V
VCO
= SDV
DD
= V
P
= 3.3 V ± 10%; AGND = DGND = 0 V; T
A
= T
MIN
to T
MAX
, unless otherwise noted. Operating
temperature range is −40°C to +85°C.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
REF
IN
CHARACTERISTICS
Input Frequency 10 250 MHz For f < 10 MHz, ensure slew rate > 21 V/µs
Input Sensitivity 0.7 AV
DD
V p-p Biased at AV
DD
/2; ac coupling ensures AV
DD
/2 bias
Input Capacitance 10 pF
Input Current ±60 µA
PHASE FREQUENCY DETECTOR (PFD)
Phase Detector Frequency 32 MHz Fractional-N
45 MHz Integer-N (band select enabled)
90 MHz Integer-N (band select disabled)
CHARGE PUMP
I
CP
Sink/Source
1
R
SET
= 5.1 kΩ
High Value
5
mA
Low Value 0.312 mA
R
SET
Range 3.9 10 kΩ
Sink and Source Current Matching 2 % 0.5 V ≤ V
CP
≤ 2.5 V
I
CP
vs. V
CP
1.5 % 0.5 V ≤ V
CP
≤ 2.5 V
I
CP
vs. Temperature 2 % V
CP
= 2.0 V
LOGIC INPUTS
Input High Voltage, V
INH
1.5 V
Input Low Voltage, V
INL
0.6 V
Input Current, I
INH
/I
INL
±1 µA
Input Capacitance, C
IN
3.0 pF
LOGIC OUTPUTS
Output High Voltage, V
OH
DV
DD
− 0.4 V CMOS output selected
Output High Current, I
OH
500 µA
Output Low Voltage, V
OL
0.4 V I
OL
= 500 µA
POWER SUPPLIES
AV
DD
3.0 3.6 V
DV
DD
, V
VCO
, SDV
DD
, V
P
AV
DD
These voltages must equal AV
DD
DI
DD
+ AI
DD
2
21 27 mA
Output Dividers 6 to 36 mA Each output divide-by-2 consumes 6 mA
I
VCO
2
70 80 mA
I
RFOUT
2
21 26 mA RF output stage is programmable
Low Power Sleep Mode 7 10 µA
RF OUTPUT CHARACTERISTICS
VCO Output Frequency 2200 4400 MHz Fundamental VCO mode
Minimum VCO Output Frequency
Using Dividers
34.375 MHz 2200 MHz fundamental output and
divide-by-64 selected
VCO Sensitivity, K
V
40 MHz/V
Frequency Pushing (Open-Loop) 1 MHz/V
Frequency Pulling (Open-Loop) 90 kHz Into 2.00 VSWR load
Harmonic Content (Second) −19 dBc Fundamental VCO output
−20 dBc Divided VCO output
Harmonic Content (Third) −13 dBc Fundamental VCO output
−10 dBc Divided VCO output