Datasheet

REV. B
ADF4252
–5–
PIN FUNCTION DESCRIPTIONS
Mnemonic Function
CP
RF
RF Charge Pump Output. This is normally connected to a loop filter that drives the input to an external VCO.
CP
GND
1 RF Charge Pump Ground.
RF
IN
A Input to the RF Prescaler. This small signal input is normally taken from the VCO.
RF
IN
BComplementary Input to the RF Prescaler.
A
GND
1Analog Ground for the RF Synthesizer.
MUXOUT This multiplexer output allows either the RF or IF lock detect, the scaled RF or IF, or the scaled reference fre-
quency to be accessed externally.
REF
IN
Reference Input. This is a CMOS input with a nominal threshold of V
DD
/2 and an equivalent input resistance of
100 kΩ. This input can be driven from a TTL or CMOS crystal oscillator.
REF
OUT
Reference Output.
D
GND
Digital Ground for the Fractional Interpolator.
CLK Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched into the
shift register on the CLK rising edge. This input is a high impedance CMOS input.
DATA Serial Data Input. The serial data is loaded MSB first with the three LSBs being the control bits. This input is a
high impedance CMOS input.
LE Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one of the
seven latches, the latch being selected using the control bits.
R
SET
Connecting a resistor between this pin and ground sets the minimum charge pump output current. The relationship
between I
CP
and R
SET
is
I
R
CP
SET
min
=
1 6875.
Therefore, with R
SET
= 2.7 kΩ, I
CPmin
= 0.625 mA.
A
GND
2Ground for the IF Synthesizer.
IF
IN
BComplementary Input to the IF Prescaler.
IF
IN
A Input to the IF Prescaler. This small signal input is normally taken from the IF VCO.
DV
DD
Positive Power Supply for the Fractional Interpolator Section. Decoupling capacitors to the ground plane should
be placed as close as possible to this pin. DV
DD
must have the same voltage as V
DD
1, V
DD
2, and V
DD
3.
CP
GND
2IF Charge Pump Ground.
CP
IF
IF Charge Pump Output. This is normally connected to a loop filter that drives the input to an external VCO.
V
P
2IF Charge Pump Power Supply. Decoupling capacitors to the ground plane should be placed as close as possible
to this pin. This voltage should be greater than or equal to V
DD
2.
V
DD
2Positive Power Supply for the IF Section. Decoupling capacitors to the ground plane should be placed as close as
possible to this pin. V
DD
2 has a value 3 V ± 10%. V
DD
2 must have the same voltage as V
DD
1, V
DD
3, and DV
DD
.
V
DD
3 Positive Power Supply for the RF Digital Section. Decoupling capacitors to the ground plane should be placed as close
as possible to this pin. V
DD
3 has a value 3 V ± 10%. V
DD
3 must have the same voltage as V
DD
1, V
DD
2, and DV
DD
.
V
DD
1 Positive Power Supply for the RF Analog Section. Decoupling capacitors to the ground plane should be placed as close
as possible to this pin. V
DD
1 has a value 3 V ± 10%. V
DD
1 must have the same voltage as V
DD
2, V
DD
3, and DV
DD
.
V
P
1 RF Charge Pump Power Supply. Decoupling capacitors to the ground plane should be placed as close as possible
to this pin. This voltage should be greater than or equal to V
DD
1.