Datasheet

REV. B–26–
ADF4252
IF
OUT
J6
C15
100pF
R12
18
R13
18
C16
100pF
VCO2
RF
OUT
VCC
V
IN
10
14
2
C4
10pF
C3
22F
6.3V
R48
0
VVCO
R17
13k
C20
82pF
C19
2.2nF
C18
270pF
R16
7.5k
R15
51
C17
100pF
R14
18
C10
10pF
C9
22F
6.3V
R44
0
V
P
C6
10pF
C5
22F
6.3V
C8
10pF
C7
22F
6.3V
V
DD
1
V
DD
2
V
DD
3
DV
DD
V
P
2
CP
IF
IF
IN
A
R43
0
R1
20
VDD’
V
DD
RF
OUT
J7
C27
100pF
R22
18
R21
18
C26
100pF
VCO1
RF
OUT
VCC
V
IN
10
14
2
C30
10pF
C29
22F
6.3V
R49
0
VVCO
R20
470
C25
3.3nF
C24
100nF
C23
10nF
R19
270
R24
51
C28
100pF
R23
18
C12
10pF
C11
22F
6.3V
V
P
V
P
1
CP
RF
RF
IN
A
C44
100pF
CP
GND
1
RF
IN
B
A
GND
1
D
GND
A
GND
2
CP
GND
2
MUXOUT
R27
10k
T16
R28
10k
R29
10k
D4
V
DD
CLK
C43
100pF
R27
2.7k
DATA
LE
T14
R39
0
R26
1k
R4
1M
R11
51
Y2
10MHz
C31
33pF
C32
33pF
C14
1nF
C13
1nF
REF
IN
J5
T13
R47
0
Y3
B+
O/P
4
3
2
GND
C45
10pF
C46
22F
R46
0
R45
0
3V
5V
U1
ADF4252BCP
REF
OUT
J8
R38
0
U6
1
2
4
VCC
R35
0
R34
0
5V
3V
VCO190–540T VCO190–1730T
Figure 10. Typical PLL Circuit Schematic