Datasheet

ADF4159 Data Sheet
Rev. D | Page 4 of 36
SPECIFICATIONS
AV
DD
= V
P
= 2.7 V to 3.45 V, DV
DD
= SDV
DD
= 1.8 V, AGND = DGND = SDGND = CPGND = 0 V, f
PFD
= 110 MHz, T
A
= T
MIN
to T
MAX
,
dBm referred to 50 Ω, unless otherwise noted.
Table 1.
Parameter
1
Min Typ Max Unit Test Conditions/Comments
RF CHARACTERISTICS
RF Input Frequency (RF
IN
) 0.5 13 GHz
−10 dBm min to 0 dBm max; for lower
frequencies, ensure a slew rate ≥ 400 V/µs
Prescaler Output Frequency 2 GHz For higher frequencies, use 8/9 prescaler
REFERENCE CHARACTERISTICS
REF
IN
Input Frequency 10 260 MHz
−5 dBm min to +9 dBm max biased at
1.8/2 (ac coupling ensures 1.8/2 bias); for
frequencies < 10 MHz, use a dc-coupled,
CMOS-compatible square wave with a
slew rate > 25 V/µs
Reference Doubler Enabled 10 50 MHz Bit DB20 in Register R2 set to 1
REF
IN
Input Capacitance 1.2 pF
REF
IN
Input Current ±100 µA
PHASE FREQUENCY DETECTOR (PFD)
Phase Detector Frequency
2
110 MHz
CHARGE PUMP
I
CP
Sink/Source Current Programmable
High Value 4.8 mA R
SET
= 5.1 kΩ
Low Value 300 µA
Absolute Accuracy 2.5 % R
SET
= 5.1 kΩ
R
SET
Range 4.59 5.1 5.61 kΩ
I
CP
Three-State Leakage Current 1 nA Sink and source current
Sink and Source Matching 2 % 0.5 V < V
CP
< V
P
− 0.5 V
I
CP
vs. V
CP
2 % 0.5 V < V
CP
< V
P
− 0.5 V
I
CP
vs. Temperature 2 % V
CP
= V
P
/2
LOGIC INPUTS
Input High Voltage, V
INH
1.17 V
Input Low Voltage, V
INL
0.4 V
Input Current, I
INH
/I
INL
±1
µA
Input Capacitance, C
IN
10 pF
LOGIC OUTPUTS
Output High Voltage, V
OH
DV
DD
− 0.4 V CMOS output selected
Output Low Voltage, V
OL
0.3 V I
OL
= 500 µA
Output High Current, I
OH
100 µA
POWER SUPPLIES
AV
DD
2.7 3.45 V
DV
DD
, SDV
DD
1.62 1.8 1.98 V
V
P
2.7 3.45 V
AI
DD
26 40 mA
Supply current drawn by AV
DD
;
f
PFD
= 110 MHz
DI
DD
7.5 10 mA
Supply current drawn by DV
DD
;
f
PFD
= 110 MHz
I
P
5.5 7 mA Supply current drawn by V
P
; f
PFD
= 110 MHz
Power-Down Mode 2 µA