Datasheet

Data Sheet ADF4159
Rev. D | Page 29 of 36
Ramp Mode with Superimposed FSK Signal
In traditional approaches, FMCW radars use either linear
frequency modulation (LFM) or FSK modulation. Used sepa-
rately, these modulations introduce ambiguity between measured
distance and velocity, especially in multitarget situations. To over-
come this issue and enable unambiguous (distance and velocity)
multitarget detection, use a ramp with FSK superimposed on it.
Example
In this example, the PLL is locked to 5790 MHz and f
PFD
=
25 MHz. The ramp with superimposed FSK is configured as
follows:
• The number of steps is set to 100; each step lasts 10 µs
and has a deviation of 100 kHz.
• The FSK signal is 25 kHz.
To enable ramp mode with FSK superimposed on it, follow
these steps:
1. Set Bit DB23 in Register R5 and Bit DB23 in Register R6
to 0.
2. Program the ramp as described in the FMCW Radar Ramp
Settings Worked Example section.
3. Program FSK on the ramp to 25 kHz by setting the bits in
Register R5 as follows:
• DB[18:3] = 4194 (deviation word)
• DB[22:19] = 3 (deviation offset word)
• DB23 = 1 (deviation word for FSK on the ramp)
• DB25 = 1 (ramp with FSK enabled)
Figure 40 shows an example of a ramp with FSK superimposed
on it. To activate the ramp, see the Activating the Ramp section.
10849-135
FREQUENCY
0 RAMP END
FREQUENCY SWEEP
TIME
FSK SHIFT
LFMSTEP =
FREQUENCY
SWEEP/NUMBER
OF STEPS
Figure 40. Combined FSK and LFM Waveform
Delayed Start
A delayed start can be used with two different parts to control
the start time. Figure 41 shows the theory of delayed start.
FREQUENCY
T
I
ME
RA
MP
WITH
DELAYED START
RAMP WITHOUT
DELAYED START
10849-034
Figure 41. Delayed Start of Sawtooth Ramp
Example
For example, to program a delayed start with two different parts
to control the start time, follow these steps:
1. Enable the delayed start of ramp option by setting Bit DB15
in Register R7 to 1.
2. Delay the ramp on the first part by 5 µs by setting Bit DB16
in Register R7 to 0 and setting the 12-bit delay start word
(Bits DB[14:3] in Register R7) to 125 (f
PFD
= 25 MHz). The
delay is calculated as follows:
Delay = t
PFD
× Delay Start Word
Delay = 40 ns × 125 = 5 µs
3. Delay the ramp on the second part by 125 µs by setting
Bit DB16 in Register R7 to 1 and setting the 12-bit delay
start word (Bits DB[14:3] in Register R7) to 125. The delay
is calculated as follows:
Delay = t
PFD
× CLK
1
× Delay Start Word
Delay = 40 ns × 25 × 125 = 125 µs
To activate the ramp, see the Activating the Ramp section.