Datasheet

ADF4159 Data Sheet
Rev. D | Page 18 of 36
DB31
12-BIT CLK
1
DIVIDER VALUE5-BIT R COUNTER
RESERVED
RESERVED
CSR
PRESCALER
CP
CURRENT
SETTING
CONTROL
BITS
DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 CR1 CPI4 CPI3 CPI2 CPI1 0 P1 U2 U1 R5 R4 R3 R2 R1 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 C3(0) C2(1) C1(0)
U1
REFERENCE
DOUBLER
0 DISABLED
1 ENABLED
CR1
CYCLE SLIP
REDUCTION
0 DISABLED
1 ENABLED
R5 R4 R3 R2 R1 R COUNTER DIVIDE RATIO
0 0 0 0 1 1
0 0 0 1 0 2
0 0 0 1 1 3
0 0 1 0 0 4
. . . . .
. . . . .
. . . . .
1 1 1 0 1 29
1 1 1 1 0 30
1 1 1 1 1 31
0 0 0 0 0 32
U2 R DIVIDER
0 DISABLED
1 ENABLED
P1 PRESCALER
0 4/5
1 8/9
I
CP
(mA)
CPI4 CPI3 CPI2 CPI1 5.1kΩ
0 0 0 0 0.31
0 0 0 1 0.63
0 0 1 0 0.94
0 0 1 1 1.25
0 1 0 0 1.57
0 1 0 1 1.88
0 1 1 0 2.19
0 1 1 1 2.5
1 0 0 0 2.81
1 0 0 1 3.13
1 0 1 0 3.44
1 0 1 1 3.75
1 1 0 0 4.06
1 1 0 1 4.38
1 1 1 0 4.69
1 1 1 1 5.0
DBB DBB DBB
RDIV2 DBB
REFERENCE
DOUBLER DBB
D12 D11 ... D2 D1
0
0
0
0
.
.
.
1
1
1
1
0
0
0
0
.
.
.
1
1
1
1
...
...
...
...
...
...
...
...
...
...
...
0
0
1
1
.
.
.
0
0
1
1
0
1
0
1
.
.
.
0
1
0
1
0
1
2
3
.
.
.
4092
4093
4094
4095
NOTES
1. DBB = DOUBLE-BUFFERED BITS.
CLK
1
DIVIDER VALUE
10849-022
Figure 27. R Divider Register (R2) Map