Datasheet
ADF4156 Data Sheet
Rev. E | Page 12 of 24
PHASE REGISTER, R1
With the control bits (Bits[2:0]) of Register R1 set to 001, the
on-chip phase register is programmed. Figure 18 shows the
input data format for programming this register.
12-Bit Phase Value
These 12 bits control what is loaded as the phase word. The
word must be less than the MOD value programmed in the
MOD/R register (R2). The word is used to program the RF
output phase from 0° to 360° with a resolution of 360°/MOD.
See the Phase Resync section for more information. In most
applications, the phase relationship between the RF signal and
the reference is not important. In such applications, the phase
value can be used to optimize the fractional and subfractional
spur levels. See the Spur Consistency and Fractional Spur
Optimization section for more information.
If neither the phase resync nor the spurious optimization
functions are being used, it is recommended that the phase
value be set to 1.
DB31 DB30 DB29 DB28 DB2
7 DB
26
DB
25
DB2
4
DB2
3 DB
2
2 DB
2
1 DB
20
DB
19
DB1
8
DB1
7 DB
1
6 DB15 DB
1
4 DB
13
DB12 DB11 DB10 DB9 DB8 DB
7 DB
6 DB
5
DB4
DB
3 DB
2 DB
1
DB0
0 0
0
0 0
0 0
0
0
RESERVED 12
-
BI
T
PHASE V
A
LU
E
(PHA
SE)
C
O
NT
RO
L
B
IT
S
0 0
0
0
0
0 0 0 P12 P11 P10 P9 P8 P7
P6
P5 P4
P3 P2
P1
C3
(0
)
C2
(
0)
C1
(
1)
P1
2 P1
1 ..........
P2 P1 PHASE VALUE (P
HASE)
0
0 ..........
0 0 0
0 0 .........
. 0 1 1 (R
ECO
MMENDED
)
0 0
.......... 1 0 2
0
0 .......... 1 1 3
.
. .......... . . .
.
. .........
. .
. .
. . .......... . . .
1 1 .......... 0 0
4092
1 1 .......... 0
1 4093
1
1 ..........
1 0 409
4
1
1 .........
. 1 1 409
5
05863-012
Figure 18. Phase Register (R1) Map