Datasheet

ADF4153 Data Sheet
Rev. F | Page 4 of 24
SPECIFICATIONS
AV
DD
= DV
DD
= SDV
DD
= 2.7 V to 3.3 V; V
P
= AV
DD
to 5.5 V; AGND = DGND = 0 V; T
A
= T
MIN
to T
MAX
, unless otherwise noted;
dBm referred to 50 Ω.
Table 1.
Parameter B Version
1
Y Version
2
Unit Test Conditions/Comments
RF CHARACTERISTICS (3 V)
See Figure 12 for input circuit
RF Input Frequency (RF
IN
) 0.5/4.0 0.5/4.0 GHz min/max B Version: −8 dBm minimum/0 dBm maximum
0.5/4.0 0.5/4.0 GHz min/max Y Version: −6.5 dBm minimum/0 dBm maximum
For lower frequencies, ensure slew rate (SR) > 400 V/µs
1.0/4.0 1.0/4.0 GHz min/max −10 dBm/0 dBm minimum/maximum
REFERENCE CHARACTERISTICS See Figure 11 for input circuit
REF
IN
Input Frequency 10/250 10/250 MHz min/max For f < 10 MHz, use a dc-coupled, CMOS-compatible
square wave; slew rate > 25 V/µs
REF
IN
Input Sensitivity 0.7/AV
DD
0.7/AV
DD
V p-p min/max Biased at AV
DD
/2
3
REF
IN
Input Capacitance 10 10 pF max
REF
IN
Input Current ±100 ±100 µA max
PHASE DETECTOR
Phase Detector Frequency
4
32 32 MHz max
CHARGE PUMP
I
CP
Sink/Source Programmable; see Table 9
High Value 5 5 mA typ With R
SET
= 5.1 kΩ
Low Value 312.5 312.5 µA typ
Absolute Accuracy 2.5 2.5 % typ With R
SET
= 5.1 kΩ
R
SET
Range 1.5/10 1.5/10 kΩ min/max
I
CP
Three-State Leakage Current 1 4.5 nA typ Sink and source current
Matching 2 2 % typ 0.5 V < V
CP
< V
P
– 0.5
I
CP
vs. V
CP
2 2 % typ 0.5 V < V
CP
< V
P
– 0.5
I
CP
vs. Temperature 2 2 % typ V
CP
= V
P
/2
LOGIC INPUTS
V
INH
, Input High Voltage 1.4 1.4 V min
V
INL
, Input Low Voltage 0.6 0.6 V max
I
INH
/I
INL
, Input Current ±1 ±1 µA max
C
IN
, Input Capacitance 10 10 pF max
LOGIC OUTPUTS
V
OH
, Output High Voltage 1.4 1.4 V min Open-drain 1 kΩ pull-up to 1.8 V
V
OL
, Output Low Voltage 0.4 0.4 V max I
OL
= 500 µA
POWER SUPPLIES
AV
DD
2.7/3.3 2.7/3.3 V min/V max
DV
DD
, SDV
DD
AV
DD
AV
DD
V
P
AV
DD
/5.5 AV
DD
/5.5 V min/V max
I
DD
24 24 mA max 20 mA typical
Low Power Sleep Mode 1 1 µA typ