Datasheet

ADF4150 Data Sheet
Rev. A | Page 4 of 28
Parameter
B Version
Unit Conditions/Comments Min Typ Max
RF OUTPUT CHARACTERISTICS
Minimum Output Frequency Using RF
Output Dividers
31.25 MHz 500 MHz VCO input and divide-by-16 selected
Maximum RF
IN
Frequency Using RF
Output Dividers
4400 MHz
Harmonic Content (Second) −19 dBc Fundamental VCO output
Harmonic Content (Third) −13 dBc Fundamental VCO output
Harmonic Content (Second)
−20
dBc
Divided VCO output
Harmonic Content (Third)
−10
dBc
Divided VCO output
Output Power
3
−4 dBm Maximum setting
+5 dBm Minimum setting
Output Power Variation ±1 dB
Level of Signal With RF Mute Enabled −40 dBm
NOISE CHARACTERISTICS
Normalized Phase Noise Floor
(PN
SYNTH
)
4
−223 dBc/Hz
PLL loop BW = 500 kHz (ABP = 3 ns)
Normalized 1/f Noise (PN
1_f
)
5
−123
dBc/Hz
10 kHz offset. Normalized to 1 GHz. (ABP = 3 ns)
Normalized Phase Noise Floor
(PN
SYNTH
)
4
−222 dBc/Hz
PLL loop BW = 500 kHz (ABP = 6 ns); low noise
mode selected
Normalized 1/f Noise (PN
1_f
)
5
−119
dBc/Hz
10 kHz offset; normalized to 1 GHz; (ABP = 6 ns);
low noise mode selected
Spurious Signals Due to PFD
Frequency
6
−90 dBc VCO output
−75 dBc RF output buffers
1
AC coupling ensures AV
DD
/2 bias.
2
T
A
= 25°C; AV
DD
= DV
DD
= 3.3 V; prescaler = 8/9; f
REFIN
= 100 MHz; f
PFD
= 26 MHz; f
RF
= 1.7422 GHz.
3
Using a tuned load.
4
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider
value) and 10 log F
PFD
. PN
SYNTH
= PN
TOT
− 10logF
PFD
− 20logN.
5
The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency (F
RF
)
and at a frequency offset (f) is given by PN = P
1_f
+ 10log(10 kHz/f) + 20log(F
RF
/1 GHz). Both the normalized phase noise floor and flicker noise are modeled in ADIsimPLL.
6
Spurious measured on EVAL-ADF4150EB1Z, using a Rohde & Schwarz FSUP signal source analyzer.