Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Functional Block Diagram
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Circuit Description
- Register Maps
- Register 0
- Register 1
- Register 2
- Register 3
- Register 4
- Initialization Sequence
- RF Synthesizer—A Worked Example
- Modulus
- Reference Doubler and Reference Divider
- 12-Bit Programmable Modulus
- Cycle Slip Reduction for Faster Lock Times
- Spurious Optimization and Fast lock
- Fast Lock Timer and Register Sequences
- Fast Lock—An Example
- Fast Lock—Loop Filter Topology
- Spur Mechanisms
- Spur Consistency and Fractional Spur Optimization
- Phase Resync
- Applications Information
- Outline Dimensions
ADF4150 Data Sheet
Rev. A | Page 28 of 28
OUTLINE DIMENSIONS
Figure 35. 24-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm ×4 mm Body, Very Very Thin Quad
(CP-24-7)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Option
ADF4150BCPZ −40°C to +85°C 24-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-24-7
ADF4150BCPZ-RL7 −40°C to +85°C 24-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-24-7
EVAL-ADF4150EB1Z Evaluation Board
1
Z = RoHS Compliant Part.
0.50
BSC
0.50
0.40
0.30
0.30
0.25
0.18
COMPLIANT
TO
JEDEC STANDARDS MO-220-WGGD.
04-12-2012-A
BOT
T
OM VIEWTOP VIEW
EXPOSED
PA
D
PIN 1
INDICATOR
4.10
4.00 SQ
3.90
SEA
TING
PLANE
0.80
0.75
0.70
0.20 REF
0.25 MIN
COPLANARITY
0.08
PIN 1
INDICA
TOR
2.65
2.50 SQ
2.45
1
24
7
12
13
18
19
6
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
0.05 MAX
0.02 NOM
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registered trademarks are the property of their respective owners.
D08226-0-11/13(A)