Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Functional Block Diagram
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Circuit Description
- Register Maps
- Register 0
- Register 1
- Register 2
- Register 3
- Register 4
- Initialization Sequence
- RF Synthesizer—A Worked Example
- Modulus
- Reference Doubler and Reference Divider
- 12-Bit Programmable Modulus
- Cycle Slip Reduction for Faster Lock Times
- Spurious Optimization and Fast lock
- Fast Lock Timer and Register Sequences
- Fast Lock—An Example
- Fast Lock—Loop Filter Topology
- Spur Mechanisms
- Spur Consistency and Fractional Spur Optimization
- Phase Resync
- Applications Information
- Outline Dimensions
Data Sheet ADF4150
Rev. A | Page 25 of 28
APPLICATIONS INFORMATION
DIRECT CONVERSION MODULATOR
Direct conversion architectures are increasingly being used to
implement base station transmitters. Figure 30 shows how Analog
Devices, Inc., parts can be used to implement such a system.
The circuit block diagram shows the AD9788 TxDAC® being
used with the ADL5375. The use of dual integrated DACs, such
as the AD9788 with its specified ±0.02 dB and ±0.004 dB gain
and offset matching characteristics, ensures minimum error
contribution (over temperature) from this portion of the
signal chain.
The local oscillator (LO) is implemented using the ADF4150.
The low-pass filter was designed using ADIsimPLL™ for a channel
spacing of 200 kHz and a closed-loop bandwidth of 35 kHz.
The LO ports of the ADL5375 can be driven differentially from
the RF
OUT
+ and RF
OUT
− outputs of the ADF4150. This gives
better performance than a single-ended LO driver and
eliminates the use of a balun to convert from a single-ended LO
input to the more desirable differential LO inputs for the
ADL5375. The typical rms phase noise (100 Hz to 5 MHz) of
the LO in this configuration is 0.61°rms.
The ADL5375 accepts LO drive levels from −10 dBm to 0 dBm.
The optimum LO power can be software programmed on the
ADF4150, which allows levels from −4 dBm to +5 dBm from
each output.
The RF output is designed to drive a 50 Ω load but must be
ac-coupled, as shown in Figure 30. If the I and Q inputs are
driven in quadrature by 2 V p-p signals, the resulting output
power from the modulator is approximately 2 dBm.
Figure 30. Direct Conversion Modulator
AD9788
TxDAC
REFIO
FSADJ
MODULATED
DIGITAL
DATA
QOUTB
IOUTA
IOUTB
QOUTA
2kΩ
LOW-PASS
FILTER
LOW-PASS
FILTER
2700pF 1200pF
39nF
680Ω
360Ω
IBBP
IBBN
QBBP
QBBN
LOIP
LOIN
SPI-COMPATIBLE SERIAL BUS
ADF4150
CP
GND
A
GND
A
GND
SD
GND
RF
OUT
–
RF
OUT
+
1nF1nF
4.7kΩ
R
SET
LE
DATA
CLK
REF
IN
FREF
IN
CP
DV
DD
AV
DD
CE
MUXOUT
V
CC
VCO
OUT
VCO
V
TUNE
1618
AV
DD
9
19
1
2
3
24
8
12 13 23
V
DD
LOCK
DETECT
51
Ω
51
Ω 51
Ω
51Ω
51Ω
15
14
20
21
LD
7
PDB
RF
17
6 22
SDV
DD
VP
5
SW
4
ADL5375
RFOUT
QUADRATURE
PHASE
SPLITTER
DSOP
RF
IN
–
RF
IN
+
11
10
V
VCO
3.9nH 3.9nH
1nF
1nF
100pF
100pF
V
VCO
08226-026