Datasheet

Data Sheet ADF4107
Rev. D | Page 3 of 20
SPECIFICATIONS
AV
DD
= DV
DD
= 3 V ± 10%, AV
DD
≤ V
P
≤ 5.5 V, AGND = DGND = CPGND = 0 V, R
SET
= 5.1 kΩ, dBm referred to 50 Ω, T
A
= T
MAX
to T
MIN
,
unless otherwise noted.
Table 1.
Parameter B Version
1
B Chips
2
(Typ) Unit Test Conditions/Comments
RF CHARACTERISTICS
RF Input Frequency (RF
IN
)
3
1.0/7.0 1.0/7.0 GHz min/max See Figure 18 for input circuit
RF Input Sensitivity –5/+5 –5/+5 dBm min/max
Maximum Allowable Prescaler Output
Frequency
4
300 300 MHz max
REF
IN
CHARACTERISTICS
REF
IN
Input Frequency 20/250 20/250 MHz min/max For f < 20 MHz, ensure slew rate >50 V/µs
REF
IN
Input Sensitivity
5
0.8/V
DD
0.8/V
DD
V p-p min/max Biased at AV
DD
/2
6
REF
IN
Input Capacitance
10
10
pF max
REF
IN
Input Current ±100 ±100 µA max
PHASE DETECTOR
Phase Detector Frequency
7
104
104
MHz max
ABP = 0,0 (2.9 ns antibacklash pulse width)
CHARGE PUMP Programmable; see Figure 25
I
CP
Sink/Source
High Value 5 5 mA typ With R
SET
= 5.1 kΩ
Low Value 625 625 µA typ
Absolute Accuracy 2.5 2.5 % typ With R
SET
= 5.1 kΩ
R
SET
Range 3.0 to 11 3.0 to 11 kΩ typ See Figure 25
I
CP
Three-State Leakage 1 1 nA typ
Sink and Source Current Matching 2 2 % typ 0.5 V ≤ V
CP
≤ V
P
− 0.5 V
I
CP
vs. V
CP
1.5 1.5 % typ 0.5 V ≤ V
CP
≤ V
P
− 0.5 V
I
CP
vs. Temperature 2 2 % typ V
CP
= V
P
/2
LOGIC INPUTS
V
IH
, Input High Voltage 1.4 1.4 V min
V
IL
, Input Low Voltage 0.6 0.6 V max
I
INH
, I
INL
, Input Current ±1 ±1 µA max
C
IN
, Input Capacitance 10 10 pF max
LOGIC OUTPUTS
V
OH
, Output High Voltage 1.4 1.4 V min Open-drain output chosen; 1 kΩ pull-up
resistor to 1.8 V
V
OH
, Output High Voltage V
DD
− 0.4 V
DD
− 0.4 V min CMOS output chosen
I
OH
100 100 µA max
V
OL
, Output Low Voltage 0.4 0.4 V max I
OL
= 500 µA
POWER SUPPLIES
AV
DD
2.7/3.3 2.7/3.3 V min/V max
DV
DD
AV
DD
AV
DD
V
P
AV
DD
/5.5 AV
DD
/5.5 V min/V max AV
DD
≤ V
P
≤ 5.5 V
I
DD
8
(AI
DD
+ DI
DD
) 17 15 mA max 15 mA typ
I
P
0.4 0.4 mA max T
A
= 25°C
Power-Down Mode
9
(AI
DD
+ DI
DD
)
10
10
µA typ
NOISE CHARACTERISTICS
Normalized Phase Noise Floor (PN
SYNTH
)
10
−223 −223 dBc/Hz typ PLL loop BW = 500 kHz, measured at
100 kHz offset
Normalized 1/f Noise (PN
1_f
)
11
−122 −122 dBc/Hz typ 10 kHz offset; normalized to 1 GHz