Datasheet

Data Sheet ADF41020
Rev. A | Page 3 of 16
SPECIFICATIONS
DV
DD
= AV
DD
= V
P
= 3.0 V ± 5%, GND = 0 V, R
SET
= 5.1 kΩ, dBm referred to 50 Ω, T
A
= T
MAX
to T
MIN
, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
RF CHARACTERISTICS See Figure 1 for input circuit
RF Input Frequency (RF
IN
)
4.0
18.0
GHz
RF Input Sensitivity −10 +10 dBm
Maximum Allowable Prescaler
Output Frequency
1
350 MHz
REF
IN
CHARACTERISTICS
REF
IN
Input Frequency 10 400 MHz For f < 10 MHz, ensure slew rate > 50 V/μs
REF
IN
Input Sensitivity 0.8 DV
DD
V p-p Biased at DV
DD
/2 when input is ac-coupled
REF
IN
Input Capacitance 10 pF
REF
IN
Input Current
±100
µA
PHASE DETECTOR
Phase Detector Frequency
2
100 MHz
CHARGE PUMP Programmable, see Figure 17
I
CP
Sink/Source
High Value 5.0 mA With R
SET
= 5.1 kΩ
Low Value 625 µA
Absolute Accuracy 3 % With R
SET
= 5.1 kΩ
R
SET
5.1 5.1 5.1 kΩ See Figure 17
I
CP
Three-State Leakage 1 2 nA T
A
= 25°C
Sink and Source Current Matching 2 % 0.5 V ≤ V
CP
≤ V
P
− 0.5 V
I
CP
vs. V
CP
1
%
0.5 V ≤ V
CP
≤ V
P
− 0.5 V
I
CP
vs. Temperature 2 % V
CP
= V
P
/2
LOGIC INPUTS
V
IH
, Input High Voltage
1.4
V
The SPI interface is 1.8 V and 3 V logic compatible
V
IL
, Input Low Voltage 0.6 V
I
INH
, I
INL
, Input Current ±1 µA
C
IN
, Input Capacitance 10 pF
LOGIC OUTPUTS
V
OH
, Output High Voltage 1.4 V
Open-drain output chosen, 1 kΩ pull-up resistor
to 1.8 V
V
OH
, Output High Voltage DV
DD
− 0.4 V CMOS output chosen
I
OH
, Output High Current 500 µA
V
OL
, Output Low Voltage 0.4 V
I
OL
, Output Low Current 500 µA
POWER SUPPLIES
AV
DD
2.85 3.15 V
DV
DD
2.85 3.15 V
V
P
2.85 3.15 V
I
DD
3
27 30 mA T
A
= 25°C
I
P
3
4.5 5 mA T
A
= 25°C
Power-Down Mode
1
µA
T
A
= 25°C