Datasheet

ADF41020 Data Sheet
Rev. A | Page 12 of 16
Figure 17. Function Latch Map
10304-017
P2 P1
0 0 8/9
0 1 16/17
1 0 32/33
1 1 64/65
PD2 PD1
MODE
0
0
X
1
0 0
1 0 1
CPI6
CPI5 CPI4
CPI3 CPI2 CPI1
0 0 0
0
0 1
0
1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
TC4 TC3 TC2
TC1
0 0
0 0 3
0 0 0
1 7
0
0 1 0 11
0 0
1 1 15
0
1 0 0 19
0 1 0 1 23
0 1 1 0
27
0 1 1 1 31
1 0 0 0 35
1 0 0 1 39
1 0
1 0 43
1 0 1
1 47
1 1
0 0 51
1 1 0 1 55
1 1 1 0 59
1 1 1
1 63
F4
0
1
1
M3 M2 M1
0 0 0
0 0 1
0
1 0
0 1 1
1 0
0
1 0 1
1
1 0
1 1 1
F3
0
1
F2
0
1
F1
0
1
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB
1
1 DB10
DB9
DB8 DB7
DB6 DB5
DB4
DB3 DB2 DB1 DB0
C2 (1) C1 (0)
F1
PD1
M1
M2M3F3P1P2
CPI1
CPI2CPI5
CPI6
TC4PD2 F2
CPI3CPI4
DB21
TC3
TC2 TC1
DB22DB23
F4
F5
F5
X
0
1
NEG
ATIVE
POSITIVE
PRESCALER
V
ALUE
POWER-
DOWN 2
CURRENT
SETTING
2
CURRENT
SETTING
1
TIMER COUNTER
CONTROL
F
AST LOCK
MODE
F
AST LOCK
ENABLE
C
P
THREE-
S
TA
TE
MUXOUT
CONTROL
POWER-
DOWN 1
COUNTER
RESET
CONTRO
L
BITS
PHASE DETECT
OR
POLARITY
COUNTER
OPERA
TION
NORMA
L
R, A, B COUNTERS
HELD IN RESET
CHARGE PUM
P
OUTPUT
NORMAL
THREE-STATE
F
AST LOCK DISABLED
F
AST LOCK MODE 1
FAST LOCK MODE 2
FAST LOCK MODE
THREE-S
TATE OUTPUT
DIGI
TAL
LOCK DETECT
(ACTIVE HIGH)
N DIVIDER OUTPUT
DV
DD
R DIVIDER OUTPUT
RESERVED
SERIAL D
ATA OUTPUT
DGND
OUTPUT
TIMEOUT
(PFD CYCLES)
I
CP
(mA)
ASYNCHRONOUS POWER-DOWN
NORMAL OPERATION
SOFTWARE POWER-DOWN
CE PIN
PRESCALER V
ALUE
PD
POLARIT
Y
0.625
1.25
1.875
2.5
3.125
3.75
4.375
5.0