Datasheet

REV.
ADF4001
–10–
Table V. Function Latch Map
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
C2 (1) C1 (0)
F1 PD1 M1M2M3F3 CPI1CPI2CPI5CPI6 TC4PD2 F2
CONTROL
BITS
COUNTER
RESET
POWER-
DOWN 1
MUXOUT
CONTROL
PHASE
DETECTOR
POLARITY
CP
THREE-
STATE
POWER-
DOWN 2
CURRENT
SETTING
1
TIMER COUNTER
CONTROL
CPI3CPI4
DB21
CURRENT
SETTING
2
TC3 TC2 TC1
DB22DB23
FASTLOCK
ENABLE
FASTLOCK
MODE
F4F5
RESERVED
CE PIN PD2 PD1 MODE
0 XXASYNCHRONOUS POWER-DOWN
1X0NORMAL OPERATION
101ASYNCHRONOUS POWER-DOWN
111SYNCHRONOUS POWER-DOWN
CPI6 CPI5 CP14 I
CP
(mA)
CPI3 CPI2 CPI1 2.7k 4.7k 10k
0001.088 0.625 0.294
0012.176 1.25 0.588
0103.264 1.875 0.882
0114.352 2.5 1.176
1005.44 3.125 1.47
1016.528 3.75 1.764
1107.616 4.375 2.058
1118.704 5.0 2.352
TIMEOUT
TC4 TC3 TC2 TC1 (PFD CYCLES)
00003
00017
001011
001115
010019
010123
011027
011131
100035
100139
101043
101147
110051
110155
111059
111163
F4 F5 FASTLOCK MODE
0X FASTLOCK DISABLED
10 FASTLOCK MODE 1
11 FASTLOCK MODE 2
F3 CHARGE PUMP OUTPUT
0NORMAL
1THREE-STATE
M3 M2 M1 OUTPUT
000THREE-STATE OUTPUT
001DIGITAL LOCK DETECT
010N DIVIDER OUTPUT
011AVDD
100R DIVIDER OUTPUT
101N-CHANNEL OPEN-DRAIN
LOCK DETECT
110SERIAL DATA OUTPUT
111DGND
PHASE DETECTOR
F2 POLARITY
0NEGATIVE
1POSITIVE
COUNTER
F1 OPERATION
0 NORMAL
1 R, N COUNTER
HELD IN RESET
X = DON’T CARE
X
X
B