Datasheet

Data Sheet ADE9153A
Rev. 0 | Page 31 of 50
COMMUNICATION VERIFICATION REGISTERS
The ADE9153A includes three register that allow SPI operation
verification. The LAST_CMD (Address 0x4AE), LAST_DATA_16
(Address 0x4AC), and LAST_DATA_32 (Address 0x423) registers
record the received CMD_HDR and the last read or transmitted
data.
CRC OF CONFIGURATION REGISTERS
The configuration register CRC feature in the ADE9153A monitors
certain user and private register values. The results are stored in
the CRC_RSLT register. When enabled, the ADE9153A generates
an interrupt on
IRQ
if any of the monitored registers change the
value of the CRC_RSLT register.
CONFIGURATION LOCK
The configuration lock feature prevents changes to the ADE9153A
configuration. To enable this feature, write 0x3C64 to the
WR_LOCK register. To disable the feature, write 0x4AD1.
To determine whether this feature is active, read the
WR_LOCK register, which reads as 1 if the protection is
enabled and 0 if it is disabled.
When this feature is enabled, it prevents writing to addresses
from Address 0x000 to Address 0x073 and Address 0x400 to
Address 0x4FE.
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