Datasheet

Data Sheet ADE7953
Rev. B | Page 17 of 72
TERMINOLOGY
Measurement Error
The error associated with the energy measurement made by the
ADE7953 is defined by
= ErrortMeasuremen
(1)
%100×
−
EnergyTrue
EnergyTrue ADE7953 by Registered Energy
Phase Error Between Channels
The high-pass filter (HPF) and digital integrator introduce a
slight phase mismatch between the current channels and the
voltage channel. The all-digital design ensures that the phase
matching between the current channels and the voltage channel
is within ±0.05° over a range of 45 Hz to 65 Hz. This internal
phase mismatch can be combined with the external phase error
(from current sensor or component tolerance) and calibrated
with the phase calibration registers.
Power Supply Rejection (PSR)
PSR quantifies the ADE7953 measurement error as a percentage
of reading when the power supplies are varied. For the ac PSR
measurement, a reading at nominal supplies (3.3 V) is taken. A
second reading is obtained with the same input signal levels when
an ac signal (120 mV rms/100 Hz) is introduced onto the supplies.
Any error introduced by this ac signal is expressed as a percentage
of reading (see the Measurement Error definition). For the dc PSR
measurement, a reading at nominal supplies (3.3 V) is taken. A
second reading is obtained with the same input signal levels when
the power supplies are varied by ±10%. Any error introduced is
again expressed as a percentage of reading.
ADC Offset Error
The ADC offset error refers to the dc offset associated with the
analog inputs to the ADCs. It means that, with the analog inputs
connected to AGND, the ADCs still see a dc analog input signal.
The magnitude of the offset depends on the gain and input range
selection. However, the offset is removed from the current and
voltage channels by a high-pass filter (HPF), and the power
calculation is not affected by this offset.
Gain Error
The gain error in the ADCs of the ADE7953 is defined as the
per-channel difference between the measured ADC output code
(minus the offset) and the ideal output code (see the Current
Channel ADCS section and the Voltage Channel ADC section).
The difference is expressed as a percentage of the ideal code.