Single Phase, Multifunction Metering IC with Neutral Current Measurement ADE7953 Data Sheet FEATURES The device incorporates three Σ-Δ ADCs with a high accuracy energy measurement core. The second input channel simultaneously measures neutral current and enables tamper detection and neutral current billing. The additional channel incorporates a complete signal path that allows a full range of measurements.
ADE7953 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Period Measurement ...................................................................... 36 General Description ......................................................................... 1 Instantaneous Powers and Waveform Sampling ........................ 37 Functional Block Diagram ..............................................................
Data Sheet ADE7953 Write Protection ..........................................................................57 ADE7953 Register Descriptions ............................................... 62 Communication Verification.....................................................57 Layout Guidelines ........................................................................... 68 Checksum Register .....................................................................58 Outline Dimensions .......................
ADE7953 Data Sheet SPECIFICATIONS VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 3.58 MHz, TMIN to TMAX = −40°C to +85°C, Register Address 0x120 set to 0x30, unless otherwise noted. Table 1. Parameter PHASE ERROR BETWEEN CHANNELS Power Factor = 0.8 Capacitive Power Factor = 0.
Data Sheet Parameter ANALOG PERFORMANCE Signal-to-Noise Ratio Current Channel A Current Channel B Voltage Channel Signal-to-Noise-and-Distortion Ratio Current Channel A, Current Channel B Voltage Channel Bandwidth (−3 dB) CF1 AND CF2 PULSE OUTPUTS Maximum Output Frequency Duty Cycle Active Low Pulse Width Jitter Output High Voltage, VOH Output Low Voltage, VOL REFERENCE REF Input Voltage Range Input Capacitance Reference Error Output Impedance Temperature Coefficient CLKIN/CLKOUT PINS Input Clock Frequency
ADE7953 Data Sheet TIMING CHARACTERISTICS SPI Interface Timing VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 3.58 MHz, TMIN to TMAX = −40°C to +85°C, unless otherwise noted. Table 2.
Data Sheet ADE7953 I2C Interface Timing VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 3.58 MHz, TMIN to TMAX = −40°C to +85°C, unless otherwise noted. Table 3. Parameter fSCL tHD;STA tLOW tHIGH tSU;STA tHD;DAT tSU;DAT tR tF tSU;STO tBUF tSP 1 Min1 0 4.0 4.7 4.0 4.7 0.
ADE7953 Data Sheet ABSOLUTE MAXIMUM RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TA = 25°C, unless otherwise noted. Table 4.
Data Sheet ADE7953 23 CF1 22 IRQ 26 MISO/SDA/Tx 25 SCLK 24 CF2 27 MOSI/SCL/Rx 28 CS PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 21 ZX_I ZX 1 RESET 2 ADE7953 DGND 4 TOP VIEW (Not to Scale) IAP 5 20 REVP 19 CLKOUT 18 CLKIN 17 VDD PULL_LOW 14 VP 12 REF 13 PULL_HIGH IBP VN 11 15 VINTA IBN 10 16 AGND 8 9 IAN 6 PULL_HIGH 7 NOTES 1. CREATE A SIMILAR PAD ON THE PCB UNDER THE EXPOSED PAD. SOLDER THE EXPOSED PAD TO THE PAD ON THE PCB TO CONFER MECHANICAL STRENGTH TO THE PACKAGE.
ADE7953 Data Sheet Pin No. 20 Mnemonic REVP 21 ZX_I 22 23 24 25 IRQ CF1 CF2 SCLK 26 27 28 MISO/SDA/Tx MOSI/SCL/Rx CS EPAD Description Reverse Power Output Indicator. See the Reverse Power section. This pin can be configured to output a range of alternative power quality signals (see the Alternative Output Functions section). Current Channel Zero-Crossing Output Pin. See the Current Channel Zero Crossing section.
Data Sheet ADE7953 TYPICAL PERFORMANCE CHARACTERISTICS 1.0 1.0 0.8 0.8 –40°C +25°C +85°C 0.4 0.2 0 –0.2 –0.4 0.2 0 –0.2 –0.4 –1.0 0.01 0.1 10 1 CURRENT CHANNE L (% FULL SCALE) 100 –0.2 –0.4 0.4 0.2 0 –0.2 –0.4 –0.6 –0.6 –0.8 –0.8 10 100 CURRENT CHANNE L (% FULL SCALE) –1.0 0.01 09320-102 1 Figure 6. Current Channel A Active Energy Error as a Percentage of Reading (Gain = 1, Temperature = 25°C) over Power Factor with Internal Reference, Integrator Off 0.
ADE7953 Data Sheet 1.0 1.0 0.8 –40°C +25°C +85°C ERROR (% OF READING) 0.4 0.2 0 –0.2 –0.4 –0.2 –0.4 –0.6 –0.8 0.1 1 10 100 Figure 11. Current Channel A Reactive Energy Error as a Percentage of Reading (Gain = 1, Power Factor = 0) over Temperature with Internal Reference, Integrator Off –1.0 0.01 0.8 PF = –0.866 PF = 0 PF = +0.866 –0.2 –0.4 0.4 0.2 0 –0.2 –0.4 –0.6 –0.6 –0.8 –0.8 1 10 100 CURRENT CHANNE L (% FULL SCALE) – 1.0 09320-108 0.1 Figure 12.
Data Sheet ADE7953 1.0 1.0 0.8 0.8 –40°C +25°C +85°C 0.2 0 –0.2 –0.4 0 –0.2 –0.4 –0.6 –0.8 –0.8 1 10 100 Figure 17. Current Channel B Active Energy Error as a Percentage of Reading (Gain = 1, Power Factor = 1) over Temperature with Internal Reference, Integrator Off – 1.0 45 65 0 –0.2 –0.4 0.4 0.2 0 –0.2 –0.4 –0.6 –0.6 –0.8 –0.8 10 100 CURRENT CHANNE L (% FULL SCALE) –1.0 0.1 09320-114 1 Figure 18.
ADE7953 Data Sheet 1.0 1.0 0.8 0.6 ERROR (% OF READING) 0.4 0.2 0 –0.2 –0.4 09320-219 0.2 0 –0.2 –0.4 45 50 55 FREQUENCY (Hz) 60 –1.0 0.01 65 Figure 23. Current Channel B Reactive Energy Error as a Percentage of Reading (Gain = 1, Temperature = 25°C) over Frequency and Power Factor with Internal Reference, Integrator Off 0.8 0.8 0.6 0.6 ERROR (% OF READING) 1.0 0.4 0.2 0 –0.2 –0.4 –0.2 –0.4 –0.8 CURRENT CHANNE L (% FULL SCALE) –1.0 0.01 09320-220 100 1.0 0.8 0.8 0.6 0.
Data Sheet ADE7953 1.0 0.8 0.8 PF = –0.5 PF = +0.5 PF = +1.0 ERROR (% OF READING) 0.6 0.4 0.2 0 –0.2 –0.4 –0.2 –0.4 –0.8 1 10 100 Figure 29. Current Channel B Active Energy Error as a Percentage of Reading (Gain = 16, Temperature = 25°C) over Power Factor with Internal Reference, Integrator On –1.0 0.1 0.8 ERROR (% OF READING) 0.6 0 –0.2 –0.4 0.4 0.2 0 –0.2 –0.4 –0.6 –0.6 –0.8 –0.8 1 10 100 –1.0 0.1 09320-126 0.1 CURRENT CHANNE L (% FULL SCALE) Figure 30.
ADE7953 Data Sheet TEST CIRCUIT 3.3V + 33nF 33nF 2 RESET 5 IAP 6 IAN 15 17 3 VINTD 1µF 1kΩ + 4.7µF 0.1µF VDD 10kΩ 4.7µF VINTA 3.3V ZX 1 REVP 20 ZX_I 21 1kΩ CS 28 1kΩ MOSI/SCL/Rx 27 33nF 33nF 9 IBP MISO/SDA/Tx 26 10 IBN SCLK 25 1kΩ ADE7953 11 SAME AS CF2 3.3V 500Ω 10kΩ VN 12 VP REF 13 3.3V 7 PULL_HIGH 8 PULL_HIGH 14 PULL_LOW 20pF CLKOUT 19 4 16 4.7µF + 0.1µF 3.58MHz CLKIN 18 20pF 09320-099 33nF AGND 1kΩ 10kΩ IRQ 22 1MΩ 110V 3.
Data Sheet ADE7953 TERMINOLOGY Measurement Error The error associated with the energy measurement made by the ADE7953 is defined by (1) Measurement Error = Energy Registered by ADE7953 − True Energy × 100% True Energy Phase Error Between Channels The high-pass filter (HPF) and digital integrator introduce a slight phase mismatch between the current channels and the voltage channel. The all-digital design ensures that the phase matching between the current channels and the voltage channel is within ±0.
ADE7953 Data Sheet ADE7953 POWER-UP PROCEDURE The ADE7953 contains an on-chip power supply monitor that supervises the power supply (VDD). While the voltage applied to the VDD pin is below 2 V ± 10%, the chip is in an inactive state. Once VDD crosses the 2 V ± 10% threshold, the power supply monitor keeps the ADE7953 in an inactive state for an additional 26 ms. This time delay allows VDD to reach the minimum specified operating voltage of 3.3 V – 10%.
Data Sheet ADE7953 THEORY OF OPERATION ANALOG INPUTS The ADE7953 includes three analog inputs that form two current channels and one voltage channel. In a standard configuration, Current Channel A is used to measure the phase current, and Current Channel B is used to measure the neutral current. The voltage channel input measures the difference between the phase voltage and the neutral voltage.
ADE7953 Data Sheet Oversampling Noise Shaping Oversampling is the first technique used to achieve high resolution. Oversampling means that the signal is sampled at a rate (frequency) that is many times higher than the bandwidth of interest. For example, the sampling rate in the ADE7953 is 895 kHz, and the bandwidth of interest is 40 Hz to 1.23 kHz. Oversampling has the effect of spreading the quantization noise (noise due to sampling) over a wider bandwidth.
Data Sheet ADE7953 CURRENT CHANNEL ADCS Figure 39 shows the ADC signal path and signal processing for Current Channel A, which is accessed through the IAP and IAN pins. The signal path for Current Channel B is identical and is accessed through the IBP and IBN pins. The ADC output is a twos complement, 24-bit data-word that is available at a rate of 6.99 kSPS (thousand samples per second).
ADE7953 Data Sheet the reference results in a 2x% deviation in meter accuracy. The reference drift is typically minimal and is usually much smaller than the drift of other components in the meter. By default, the ADE7953 is configured to use the internal reference. If Bit 0 of the EX_REF register (Address 0x800) is set to 1, an external voltage reference can be applied to the REF pin. REFERENCE CIRCUIT The ADE7953 has an internal voltage reference of 1.2 V nominal, which appears on the REF pin.
Data Sheet ADE7953 ROOT MEAN SQUARE MEASUREMENT the IRMSA (Address 0x21A and Address 0x31A) and IRMSB (Address 0x21B and Address 0x31B) registers, respectively. Both of these registers are updated at a rate of 6.99 kHz. With fullscale inputs on Current Channel A and Current Channel B, the expected reading on the IRMSA and IRMSB register is 9032007d. Root mean square (rms) is a measurement of the magnitude of an ac signal.
ADE7953 Data Sheet ACTIVE POWER CALCULATION ripple associated with it. This ripple is sinusoidal and has a frequency equal to twice the line frequency. Because the ripple is sinusoidal in nature, it is removed when the active power signal is integrated to compute the active energy (see the Active Energy Calculation section). Power is defined as the rate of energy flow from the source to the load. It is defined as the product of the voltage and current waveforms.
Data Sheet ADE7953 AENERGYx[23:0] SIGN OF ACTIVE POWER CALCULATION The active power measurement in the ADE7953 is a signed calculation. If the phase differential between the current and voltage waveforms is more than 90°, the power is negative. Negative power indicates that energy is being injected back into the grid.
ADE7953 Data Sheet Active Energy Integration Time Under Steady Load The discrete time sample period (T) for the accumulation registers is 4.83 μs (1/206.9 kHz). With full-scale sinusoidal signals on the analog inputs and the AWGAIN and BWGAIN registers set to 0x400000, a pulse is generated and added to the AENERGYA and AENERGYB registers every 4.83 μs. The maximum positive value that can be stored in the 24-bit AENERGYA and AENERGYB registers is 0x7FFFFF before the register overflows.
Data Sheet ADE7953 xWGAIN xWATTOS + OUTPUT FROM LPF2 48 + 0 INTERNAL ACCUMULATION FIXED INTERNAL THRESHOLD LPF1 ZERO-CROSSING DETECTION CALIBRATION CONTROL 23 15 LINECYC AENERGYx 0 0 09320-016 OUTPUT FROM VOLTAGE CHANNEL ADC Figure 48. Active Energy Line Cycle Accumulation Note that when line cycle accumulation mode is first enabled, the reading after the first CYCEND flag should be ignored because it may be inaccurate.
ADE7953 Data Sheet REACTIVE POWER CALCULATION Reactive power is defined as the product of the voltage and current waveforms when one of these signals is phase shifted by 90°. The resulting waveform is called the instantaneous reactive power signal. The ADE7953 reactive power measurement is stable over the full frequency range. The dc component of the instantaneous reactive power signal is then extracted by a low-pass filter to obtain the reactive power information.
Data Sheet ADE7953 REACTIVE ENERGY CALCULATION Reactive Energy Integration Time Under Steady Load The ADE7953 achieves the integration of the reactive power signal in two stages. In the first stage, the reactive power signals are accumulated in an internal 48-bit register every 143 μs (6.99 kHz) until an internal fixed threshold is reached. When this threshold is reached, a pulse is generated and is accumulated in 24-bit, user-accessible accumulation registers.
ADE7953 Data Sheet The contents of the RENERGYA and RENERGYB registers are updated synchronous to the CYCEND flag. The RENERGYA and RENERGYB registers hold their current values until the end of the next line cycle period, when the contents are replaced with the new reading. If the read-with-reset bit (RSTREAD) in the LCYCMODE register (Address 0x004) is set, the contents of the RENERGYA and RENERGYB registers are cleared after a read and remain at 0 until the end of the next line cycle period.
Data Sheet ADE7953 APPARENT POWER CALCULATION This process occurs simultaneously on Current Channel A and Current Channel B, and the resulting readings can be read in the 24-bit APENERGYA (Address 0x222 and Address 0x322) and APENERGYB (Address 0x223 and Address 0x323) registers. Apparent power is defined as the maximum power that can be delivered to a load. VRMS and IRMS are the effective voltage and current delivered to the load, respectively.
ADE7953 Data Sheet xVAGAIN xVAOS APPARENT POWER SIGNAL + + 48 0 INTERNAL ACCUMULATION FIXED INTERNAL THRESHOLD LPF1 ZERO-CROSSING DETECTION CALIBRATION CONTROL 23 15 LINECYC 0 APENERGYx 0 09320-125 OUTPUT FROM VOLTAGE CHANNEL ADC Figure 56.
Data Sheet ADE7953 ENERGY-TO-FREQUENCY CONVERSION The ADE7953 provides two energy-to-frequency conversions for calibration purposes. After initial calibration at manufacturing, the manufacturer or end customer is often required to verify the meter accuracy. One convenient way to do this is to provide an output frequency that is proportional to the active, reactive, or apparent power, or to the current rms under steady load conditions.
ADE7953 Data Sheet ENERGY CALIBRATION GAIN CALIBRATION Current Channel Gain Adjustment The active, reactive, and apparent power measurements can be calibrated on Current Channel A and Current Channel B separately. This allows meter-to-meter gain variation to be compensated for. A gain calibration register is also provided on Current Channel B. This register can be used to match Current Channel B to Current Channel A for simple calibration and computation.
Data Sheet ADE7953 OFFSET CALIBRATION RMS Offsets Power Offsets The ADE7953 includes offset calibration registers to allow offset in the rms measurements to be corrected. Offset calibration registers are available for the IRMS measurements on Current Channel A and Current Channel B, as well as for the VRMS measurement. Offset can exist in the rms calculation due to input noise that is integrated in the dc component of V2(t).
ADE7953 Data Sheet PERIOD MEASUREMENT The ADE7953 provides a period measurement of the voltage channel. This measurement is provided in the 16-bit, unsigned period register (Address 0x10E). The period register is updated once every line period and has a settling time of 30 ms to 40 ms associated with it before the period measurement is stable. The value of the period register for a 50 Hz network is approximately 4460 in decimal (223 kHz/50 Hz) and 3716 in decimal (223 kHz/60 Hz) for a 60 Hz network.
Data Sheet ADE7953 INSTANTANEOUS POWERS AND WAVEFORM SAMPLING The ADE7953 provides access to the current and voltage channel waveform data, along with the instantaneous active, reactive, and apparent powers. This information allows the instantaneous data to be analyzed in more detail, including reconstruction of the current and voltage input for harmonic analyses. These measurements are available from a set of 24-bit/32-bit signed registers (see Table 7). All measurements are updated at a rate of 6.
ADE7953 Data Sheet POWER FACTOR The ADE7953 provides a direct power factor measurement simultaneously on Current Channel A and Current Channel B. Power factor in an ac circuit is defined as the ratio of the active power flowing to the load to the apparent power. The power factor measurement is defined in terms of “leading” or “lagging,” referring to whether the current waveform is leading or lagging the voltage waveform.
Data Sheet ADE7953 ANGLE MEASUREMENT The ADE7953 can measure the time delay between the current and voltage inputs. This feature is available on both Current Channel A and Current Channel B. The negative-to-positive transitions identified by the zero-crossing detection circuit are used as a start and stop for the measurement (see Figure 60). PHASE A CURRENT ANGLE_x 360 f LINE cos x cos ANGLE _ x 223 kHz (38) where: x = A or B. fLINE is 50 Hz or 60 Hz.
ADE7953 Data Sheet NO-LOAD DETECTION The ADE7953 includes a no-load detection feature that eliminates “meter creep.” Meter creep is defined as excess energy that is accumulated by the meter when there is no load attached. The ADE7953 warns of this condition and stops energy accumulation if the energy falls below a programmable threshold. The ADE7953 includes a no-load feature on the active, reactive, and apparent energy measurements.
Data Sheet ADE7953 Active Energy No-Load Status Bits In addition to the active energy no-load interrupt, the ADE7953 includes two unlatched status bits that continually monitor the no-load status of Current Channel A and Current Channel B. The ACTNLOAD_A and ACTNLOAD_B bits are located in the ACCMODE register (Address 0x201 and Address 0x301). These bits differ from the interrupt status bits in that they are unlatched and can, therefore, be used to drive an LED.
ADE7953 Data Sheet Apparent Energy No-Load Interrupt Two interrupts are associated with the apparent energy no-load feature: one for Current Channel A (phase) and one for Current Channel B (neutral). If enabled, these interrupts are triggered when the apparent energy falls below the programmed threshold. The Current Channel A apparent energy no-load interrupt can be enabled by setting the VA_NOLOADA bit (Bit 8) in the IRQENA register (Address 0x22C and Address 0x32C).
Data Sheet ADE7953 ZERO-CROSSING DETECTION The ADE7953 includes a zero-crossing (ZX) detection feature on all three input channels. Zero-crossing detection allows measurements to be synchronized to the frequency of the incoming waveforms. Zero-crossing detection is performed at the output of LPF1 to ensure that no harmonics or distortion affect the accuracy of the zero-crossing measurement. LPF1 is a single-pole filter with a −3 dB cutoff of 80 Hz and is clocked at 223 kHz.
ADE7953 Data Sheet ZERO-CROSSING TIMEOUT The ADE7953 includes a zero-crossing timeout feature that is designed to detect when no zero crossings are obtained over a programmable time period. This feature is available on both current channels and the voltage channel and can be used to detect when the input signal has dropped out. The duration of the zero-crossing timeout is programmed in the 16-bit ZXTOUT register (Address 0x100). The same timeout duration is used for all three channels.
Data Sheet ADE7953 VOLTAGE SAG DETECTION The ADE7953 includes a sag detection feature that warns the user when the absolute value of the line voltage falls below the programmable threshold for a programmable number of line cycles. This feature can provide an early warning signal that the line voltage is dropping out. The voltage sag feature is controlled by two registers: SAGCYC (Address 0x000) and SAGLVL (Address 0x200 and Address 0x300).
ADE7953 Data Sheet PEAK DETECTION The ADE7953 includes a peak detection feature on both Current Channel A (phase) and Current Channel B (neutral) and on the voltage channel. This feature continuously records the maximum value of the voltage and current waveforms. Peak detection can be used with overvoltage and overcurrent detection to provide a complete swell detection function (see the Overcurrent and Overvoltage Detection section).
Data Sheet ADE7953 INDICATION OF POWER DIRECTION The ADE7953 includes sign indication on the active and reactive energy measurements. Sign indication allows positive and negative energy to be identified and billed separately if required. It also helps detect a miswiring condition. This feature is available on both Current Channel A and Current Channel B.
ADE7953 Data Sheet OVERCURRENT AND OVERVOLTAGE DETECTION The ADE7953 provides an overcurrent and overvoltage feature that detects whether the absolute value of the current or voltage waveform exceeds a programmable threshold. This feature uses the instantaneous voltage and current signals. The two registers associated with this feature, OVLVL (Address 0x224 and Address 0x324) and OILVL (Address 0x225 and Address 0x325), are used to set the voltage and current channel thresholds, respectively.
Data Sheet ADE7953 ALTERNATIVE OUTPUT FUNCTIONS The ADE7953 includes three output pins that are configured by default to output power quality information. • • • Pin 1 (ZX) provides a voltage channel zero-crossing signal, as described in the Voltage Channel Zero Crossing section. Pin 21 (ZX_I) provides a current channel zero-crossing signal, as described in the Current Channel Zero Crossing section. Pin 20 (REVP) provides polarity information, as described in the Reverse Power section.
ADE7953 Data Sheet ADE7953 INTERRUPTS The ADE7953 interrupts are separated into two groups. The first group of interrupts is associated with the voltage channel and Current Channel A. The second group of interrupts is associated with Current Channel B. See Table 22 and Table 24 for a list of the interrupts. All interrupts are disabled by default with the exception of the RESET interrupt that is located within the group of primary interrupts.
Data Sheet ADE7953 COMMUNICATING WITH THE ADE7953 All ADE7953 features can be accessed via a group of on-chip registers. For a detailed list of all the registers, see the ADE7953 Registers section. Three different communication interfaces can be used to access the on-chip registers. Therefore, although Pin 25 (SCLK) and Pin 28 (CS) are not required if communicating via I2C or UART, these pins should be configured in hardware as shown in Table 9 to ensure the functionality of the autodetection system.
ADE7953 Data Sheet SPI INTERFACE The serial peripheral interface (SPI) uses all four communication pins: CS, SCLK, MOSI, and MISO. The SPI communication operates in slave mode and, therefore, a clock must be provided on the SCLK pin (MOSI is an input, and MISO is an output). This clock synchronizes all communications and can operate up to a maximum speed of 5 MHz. See the SPI Interface Timing section for more information about the communication timing requirements.
Data Sheet ADE7953 I2C INTERFACE I2C Write Operations The ADE7953 supports a fully licensed I2C interface. The I2C interface operates as a slave and uses two shared pins: SDA and SCL. The SDA pin is a bidirectional input/output pin, and the SCL pin is the serial clock. Both pins are shared with the SPI and UART interfaces. The I2C interface operates at a maximum serial clock frequency of 400 kHz.
ADE7953 Data Sheet I2C Read Operations The second stage of the read operation begins with the master generating a new start condition. This start condition consists of the same slave address but with the LSB set to 1 to signify that a read is being issued. After this byte is received, the ADE7953 issues an acknowledge (ACK). The ADE7953 then sends the register contents to the master, which acknowledges the reception of each byte. All bytes are sent MSB first.
Data Sheet ADE7953 UART INTERFACE Table 10. Frames in the UART Packet The ADE7953 provides a simple universal asynchronous receiver/transmitter (UART) interface that allows all the functions of the ADE7953 to be accessed using only two single-direction pins. The UART interface allows an isolated communication interface to be achieved using only two low cost opto-isolators. The UART interface operates at a fixed baud rate of 4800 bps and is therefore suitable for low speed designs.
ADE7953 Data Sheet UART Read UART Write A read from the ADE7953 via the UART interface is initiated by the master sending a packet of three frames. If the first frame has the value 0x35, a read is being issued. The second and third frames contain the address of the register being accessed. When the ADE7953 receives a legal packet, it decodes the command (see Figure 73). A write to the ADE7953 via the UART interface is initiated by the master sending a packet of three frames.
Data Sheet ADE7953 COMMUNICATION VERIFICATION AND SECURITY COMMUNICATION VERIFICATION The ADE7953 includes three security measures to increase communication robustness and to help prevent inadvertent modifications to its internal registers. The write protection, communication verification, and checksum features can be used together to help increase the robustness and noise immunity of the meter design.
ADE7953 Data Sheet LFSR GENERATOR Table 12 lists the registers included in the checksum. An additional eight internal reserved registers are also included in the checksum. The ADE7953 computes the cyclic redundancy check (CRC) based on the IEEE 802.3 standard. The contents of the registers are introduced one by one into a linear feedback shift register (LFSR) based generator, starting with the least significant bit. The 32-bit result is written to the CRC register. Figure 75 shows how the LFSR works.
Data Sheet ADE7953 Table 12.
ADE7953 Data Sheet ADE7953 REGISTERS The ADE7953 contains registers that are 8, 16, 24, and 32 bits long. All signed registers are in the twos complement format with the exception of the PHCALA and PHCALB registers, which are in sign magnitude format. The 24-bit and 32-bit registers contain the same data but can be accessed in two different register lengths. The 24-bit register option increases communication speed; the 32-bit register option provides simplicity when coding with the long format.
Data Sheet ADE7953 Table 15.
ADE7953 Address 24-Bit 32-Bit 0x28C 0x38C 0x28D 0x38D 0x28E 0x38E 0x28F 0x38F 0x290 0x390 0x291 0x391 0x292 0x392 0x293 0x393 0x294 0x394 0x295 0x395 0x296 0x396 0x297 0x397 0x2FF 0x3FF Data Sheet Register Name BIGAIN BVGAIN BWGAIN BVARGAIN BVAGAIN Reserved BIRMSOS Reserved Reserved BWATTOS BVAROS BVAOS LAST_RWDATA R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R Default 0x400000 0x400000 0x400000 0x400000 0x400000 0x000000 0x000000 0x000000 0x000000 0x000000 0x000000 0x000000 0x000000 Type Unsigne
Data Sheet ADE7953 Bits 8 Bit Name CRC_ENABLE Default 0 [10:9] 11 Reserved ZX_I 00 0 [13:12] ZX_EDGE 00 14 15 Reserved COMM_LOCK 0 1 Description 0 = CRC is disabled 1 = CRC is enabled Reserved 0 = ZX_I is based on Current Channel A 1 = ZX_I is based on Current Channel B Zero-crossing interrupt edge selection Setting Edge Selection 00 Interrupt is issued on both positive-going and negative-going zero crossing 01 Interrupt is issued on negative-going zero crossing 10 Interrupt is issued on posit
ADE7953 Data Sheet Table 20.
Data Sheet ADE7953 Table 21.
ADE7953 Data Sheet Interrupt Enable and Interrupt Status Registers Current Channel A and Voltage Channel Registers Table 22.
Data Sheet Bits 17 18 19 20 21 Bit Name WSMP CYCEND Sag Reset CRC ADE7953 Description Set to 1 when new waveform data is acquired Set to 1 at the end of a line cycle accumulation period Set to 1 when a sag event has occurred Set to 1 at the end of a software or hardware reset Set to 1 when the checksum has changed Current Channel B Registers Table 24.
ADE7953 Data Sheet LAYOUT GUIDELINES Figure 78 presents a basic schematic of the ADE7953 together with its surrounding circuitry, decoupling capacitors at pins VDD, VINTA, VINTD, and REF, and the 3.58 MHz crystal and its load capacitors. The rest of the pins are dependent on the particular application and are not shown here. Figure 77 presents a proposed layout of a printed circuit board (PCB) with two layers that have the components placed only on the top of the board.
Data Sheet ADE7953 OUTLINE DIMENSIONS 22 0.50 BSC 1 21 EXPOSED PAD 3.40 3.30 SQ 3.20 15 TOP VIEW 0.80 0.75 0.70 0.50 0.40 0.30 7 14 8 BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.203 REF SEATING PLANE PIN 1 INDICATOR 28 0.20 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WHHD-3. 05-23-2012-B PIN 1 INDICATOR 0.30 0.25 0.18 5.10 5.00 SQ 4.90 Figure 79.
ADE7953 Data Sheet NOTES Rev.
Data Sheet ADE7953 NOTES Rev.
ADE7953 Data Sheet NOTES I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2011–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09320-0-11/13(B) Rev.
