Datasheet

Data Sheet ADE7880
Rev. A | Page 65 of 104
the
mputes the instantaneous values of all phase powers:
ed
ve
active, reactive, or apparent powers under steady load conditions.
This output frequency can provide a simple, single-wire,
optically isolated interface to external calibration equipment.
Figure 87 illustrates the energy-to-frequency conversion in
ADE7880.
The DSP co
total active, fundamental active, fundamental reactive, and
apparent. The process in which the energy is sign accumulat
in various xWATTHR, xFVARHR, and xVAHR registers has
already been described in the energy calculation sections: Acti
Energy Calculation, Fundamental Reactive Energy Calculation,
and Apparent Energy Calculation. In the energy-to-frequency
conversion process, the instantaneous powers generate signals
at the frequency output pins (CF1, CF2, and CF3). One digital-
to-frequency converter is used for every CFx pin. Every converter
sums certain phase powers and generates a signal proportional
to the sum. Two sets of bits decide what powers are converted.
First, Bits[2:0] (TERMSEL1[2:0]), Bits[5:3] (TERMSEL2[2:0]),
and Bits[8:6] (TERMSEL3[2:0]) of the COMPMODE register
decide which phases, or which combination of phases, are added.
The TERMSEL1 bits refer to the CF1 pin, the TERMSEL2 bits
refer to the CF2 pin, and the TERMSEL3 bits refer to the CF3
pin. The TERMSELx[0] bits manage Phase A. When set to 1,
Phase A power is included in the sum of powers at the CFx
converter. When cleared to 0, Phase A power is not included.
The TERMSELx[1] bits manage Phase B, and the TERMSELx[2]
bits manage Phase C. Setting all TERMSELx bits to 1 means all
3-phase powers are added at the CFx converter. Clearing all
TERMSELx bits to 0 means no phase power is added and no
CF pulse is generated.
Second, Bits[2:0] (CF1SEL[2:0]), Bits[5:3] (CF2SEL[2:0]), and
Bits[8:6] (CF3SEL[2:0]) in the CFMODE register decide what
type of power is used at the inputs of the CF1, CF2, and CF3
converters, respectively. Table 23 shows the values that CFxSEL
can have: total active, apparent, fundamental active, or fundamental
reactive powers.
Table 23. CFxSEL Bits Description
CFxSEL Description Registers Latched When CFxLATCH = 1
000 CFx signal proportional to the sum of total phase active powers AWATTHR, BWATTHR, CWATTHR
001 Reserved
010 CFx signal proportional to the sum of phase apparent powers AVAHR, BVAHR, CVAHR
011
CFx signal proportional to the sum of fundamental phase active
powers
AFWATTHR, BFWATTHR, CFWATTHR
100
CFx signal proportional to the sum of fundamental phase reactive
powers
AFVARHR, BFVARHR, CFVARHR
101 to 111 Reserved