Datasheet

ADE7758 Data Sheet
Rev. E | Page 60 of 72
REGISTERS
COMMUNICATIONS REGISTER
The communications register is an 8-bit, write-only register that
controls the serial data transfer between the ADE7758 and the
host processor. All data transfer operations must begin with a
write to the communications register.
The data written to the communications register determines
whether the next operation is a read or a write and which
register is being accessed.
Table 16 outlines the bit designations for the communications
register.
Table 16. Communications Register
Bit Location Bit Mnemonic Description
0 to 6 A0 to A6
The seven LSBs of the communications register specify the register for the data transfer operation.
Table 17 lists the address of each ADE7758 on-chip register.
7
W/R
When this bit is a Logic 1, the data transfer operation immediately following the write to the
communications register is interpreted as a write to the ADE7758. When this bit is a Logic 0, the data
transfer operation immediately following the write to the communications register is interpreted as a
read operation.
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
W/R
A6 A5 A4 A3 A2 A1 A0
Table 17. ADE7758 Register List
Address
[A6:A0]
Name R/W
1
Length Type
2
Default
Value
Description
0x00 Reserved – Reserved.
0x01 AWATTHR R 16 S 0
Watt-Hour Accumulation Register for Phase A. Active power is
accumulated over time in this read-only register. The AWATTHR register
can hold a maximum of 0.52 seconds of active energy information with
full-scale analog inputs before it overflows (see the Active Energy
Calculation section). Bit 0 and Bit 1 of the COMPMODE register determine
how the active energy is processed from the six analog inputs.
0x02 BWATTHR R 16 S 0 Watt-Hour Accumulation Register for Phase B.
0x03 CWATTHR R 16 S 0 Watt-Hour Accumulation Register for Phase C.
0x04 AVARHR R 16 S 0
VAR-Hour Accumulation Register for Phase A. Reactive power is
accumulated over time in this read-only register. The AVARHR register
can hold a maximum of 0.52 seconds of reactive energy information
with full-scale analog inputs before it overflows (see the Reactive Energy
Calculation section). Bit 0 and Bit 1 of the COMPMODE register
determine how the reactive energy is processed from the six analog
inputs.
0x05 BVARHR R 16 S 0 VAR-Hour Accumulation Register for Phase B.
0x06 CVARHR R 16 S 0 VAR-Hour Accumulation Register for Phase C.
0x07 AVAHR R 16 S 0
VA-Hour Accumulation Register for Phase A. Apparent power is
accumulated over time in this read-only register. The AVAHR register can
hold a maximum of 1.15 seconds of apparent energy information with
full-scale analog inputs before it overflows (see the Apparent Energy
Calculation section). Bit 0 and Bit 1 of the COMPMODE register determine
how the apparent energy is processed from the six analog inputs.
0x08 BVAHR R 16 S 0 VA-Hour Accumulation Register for Phase B.
0x09 CVAHR R 16 S 0 VA-Hour Accumulation Register for Phase C.
0x0A AIRMS R 24 S 0
Phase A Current Channel RMS Register. The register contains the rms
component of the Phase A input of the current channel. The source is
selected by data bits in the mode register.
0x0B BIRMS R 24 S 0 Phase B Current Channel RMS Register.
0x0C CIRMS R 24 S 0 Phase C Current Channel RMS Register.
0x0D AVRMS R 24 S 0 Phase A Voltage Channel RMS Register.