Datasheet

REV. 0–32–
ADE7754
Table VIII. Register List
Address Default
[A5:A0] Name R/W* Length Value Description
00h Reserved Reserved.
01h AENERGY R 24 0 Active Energy Register. Active power is accumulated over time in an inter-
nal register. The AENERGY register is a read-only register that reads this
internal register and can hold a minimum of 88 seconds of active energy
information with full-scale analog inputs before it overflows. See the Energy
Calculation section. Bits 7 to 3 of the WATMODE register determine how
the active energy is processed from the six analog inputs. See Table XIV.
02h RAENERGY R 24 0 Same as the AENERGY register, except that the internal register is reset
to 0 following a read operation.
03h LAENERGY R 24 0
Line Accumulation Active Energy Register. The instantaneous active power is
accumulated in this read-only register over the LINCYC number of half line
cycles. Bits 2 to 0 of the WATMODE register determine how the line accumu-
lation active energy is processed from the six analog inputs. See Table XIV.
04h VAENERGY R 24 0 VA Energy Register. Apparent power is accumulated over time in this
read-only register. Bits 7 to 3 of the VAMODE register determine how the
apparent energy is processed from the six analog inputs. See Table XV.
05h RVAENERGY R 24 0 Same as the VAENERGY register except that the register is reset to 0
following a read operation.
06h LVAENERGY R 24 0 Apparent Energy Register. The instantaneous apparent power is accu-
mulated in this read-only register over the LINCYC number of half line
cycles. Bits 2 to 0 of the VAMODE register determine how the apparent
energy is processed from the six analog inputs. See Table XV.
07h PERIOD R 15 0 Period of the line input estimated by zero-crossing processing. Data Bit 0
and 1 and 4 to 6 of the MMODE register determine the voltage channel
used for period calculation. See Table XII.
08h TEMP R 8 0 Temperature Register. This register contains the result of the latest
temperature conversion. Refer to the Temperature Measurement section
for details on how to interpret the content of this register.
09h WFORM R 24 0 Waveform Register. This register contains the digitized waveform of one
of the six analog inputs. The source is selected by Data Bits 0 to 2 in the
WAVMode register. See Table XIII.
0Ah OPMODE R/W 8 4 Operational Mode Register. This register defines the general configuration
of the ADE7754. See Table IX.
0Bh MMODE R/W 8 70h Measurement Mode Register. This register defines the channel used for
period and peak detection measurements. See Table XII.
0Ch WAVMODE R/W 8 0 Waveform mode register. This register defines the channel and sampling
frequency used in waveform sampling mode. See Table XIII.
0Dh WATMODE R/W 8 3Fh This register configures the formula applied for the active energy and
line active energy measurements. See Table XIV.
0Eh VAMODE R/W 8 3Fh This register configures the formula applied for the apparent energy and
line apparent energy measurements. See Table XV.
0Fh IRQEN R/W 16 0 IRQ Enable Register. It determines whether an interrupt event will
generate an active low output at IRQ pin. See Table XVI.
10h STATUS R 16 0 IRQ Status Register. This register contains information regarding the
source of ADE7754 interrupts. See Table XVII.
11h RSTATUS R 16 0 Same as the status register, except that its contents are reset to 0 (all
flags cleared) after a read operation.
12h ZXTOUT R/W 16 FFFFh Zero Cross Timeout Register. If no zero crossing is detected within a
time period specified by this register, the interrupt request line (IRQ)
will go active low for the corresponding line voltage. The maximum
timeout period is 2.3 seconds. See the Zero-Crossing Detection section.