Datasheet

ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Rev. B | Page 70 of 152
Integration Time Under Steady Load: Reactive Energy
As mentioned in the Active Energy Calculation section, the
discrete time sample period (T) for the accumulation register is
1.22 µs (5/MCLK). With full-scale sinusoidal signals on the
analog inputs and the VARGAIN register (Address 0x1E) and
the VARDIV register (Address 0x25) set to 0x000, the
integration time before the reactive energy register overflows is
calculated in Equation 26.
Time =
min82.6sec6.409s22.1
0xCCCCD
FFFFFFFF,0xFFFF,
==μ×
(26)
When VARDIV is set to a value different from 0, the integration
time varies, as shown in Equation 27.
VARDIVTimeTime
WDIV
×=
=0
(27)
Reactive Energy Accumulation Modes
Var Signed Accumulation Mode
The ADE7169/ADE7569 reactive energy default accumulation
mode is a signed accumulation based on the reactive power
information.
Var Antitamper Accumulation Mode
The ADE7169/ADE7569 are placed in var antitamper
accumulation mode by setting the SAVARM bit in the ACCMODE
register (Address 0x0F). In this mode, the reactive power is
accumulated depending on the sign of the active power. When
the active power is positive, the reactive power is added as it is
to the reactive energy register. When the active power is
negative, the reactive power is subtracted from the reactive
energy accumulator (see Figure 73). The CF pulse also reflects
this accumulation method when in this mode. The default setting
for this mode is off. Transitions in the direction of power flow and
no load threshold are active in this mode.
POSPOS
INTERRUPT STATUS REGISTERS
NEG
APSIGN FLAG
ACTIVE POWER
NO-LOAD
THRESHOLD
NO-LOAD
THRESHOLD
REACTIVE ENERGY
NO-LOAD
THRESHOLD
REACTIVE POWER
NO-LOAD
THRESHOLD
0
6353-048
Figure 73. Reactive Energy Accumulation in
Antitamper Accumulation Mode