Datasheet

ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Rev. B | Page 18 of 152
Pin No. Mnemonic Description
60 V
DD
3.3 V Power Supply Input from the Regulator. This pin is connected internally to V
SWOUT
when the regulator is
selected as the power supply for the ADE7566/ADE7569. This pin should be decoupled with a 10 μF capacitor
in parallel with a ceramic 100 nF capacitor.
61 V
SWOUT
3.3 V Power Supply Output. This pin provides the supply voltage for the LDOs and internal circuitry of the
ADE7566/ADE7569. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF
capacitor.
62 V
INTD
This pin provides access to the on-chip 2.5 V digital LDO. No external active circuitry should be connected to
this pin. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.
63 DGND Ground Reference for Digital Circuitry.
64 V
DCIN
Analog Input for DC Voltage Monitoring. The maximum input voltage on this pin is V
SWOUT
with respect to
AGND. This pin is used to monitor the preregulated dc voltage.
EP Exposed Pad
The exposed pad on the bottom of the LFCSP enhances thermal performance and is electrically connected
to ground inside the package. It is recommended that the exposed pad be connected to the ground plane
on the board.