Datasheet
REV. B
–3–
ADDAC80/ADDAC85/ADDAC87
ADDAC80 ADDAC85 ADDAC87
Model Min Typ Max Min Typ Max Min Typ Max Unit
TEMPERATURE RANGE
Specifications 0 +70 –25 +85 –55 +125 °C
Operating –25 +85 –55 +125 –55 +125 °C
Storage –25 +125 –65 +150 –65 +150 °C
NOTES
1
Least Significant Bit.
2
Adjustable to zero with external trim potentiometer.
3
FSR means “Full Scale Range” and is 20 V for the ±10 V range and 10 V for the ± 5 V range.
4
Gain and offset errors adjusted to zero at 25°C.
5
C
F
= 0, see Figure 3a.
6
Maximum with no degradation of specification, must be a constant load.
7
A minimum of ±12.3 V is required for a ±10 V full scale output and ±11.4 V is required for all other voltage ranges.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
Specifications subject to change without notice.
ADDAC80 ADDAC85 ADDAC87
Model Min Typ Max Min Typ Max Min Typ Max Unit
TECHNOLOGY Hybrid Hybrid Hybrid
DIGITAL INPUT
Binary–CBI 12 12 12 Bits
BCD–CCD 3 3 3 Digits
Logic Levels (TTL Compatible)
V
IH
(Logic “1”) 2.0 5.5 2.0 5.5 2.0 5.5 V
V
IL
(Logic “0”) 0 0.8 0 0.8 0 0.8 V
I
IH
(V
IH
= 5.5 V) 250 250 250 µA
I
IL
(V
IL
= 0.8 V) –100 –100 –100 µA
TRANSFER CHARACTERISTICS
ACCURACY
Linearity Error @ 25°C
CBI ±1/4 ±1/2 ±1/2 ± 1/2 LSB
1
CCD ±1/8 ±1/4 ±1/4 ± 1/4 LSB
T
A
@
T
MIN
to T
MAX
±1/4 ±1/2 ±1/4 ±1/2 ±1/2 ±1/2 LSB
Differential Linearity Error @ 25°C
CBI ±1/2 ±3/4 ±1/2 ±1/2 LSB
CCD ±1/4 ±1/2 ±1/2 ±1/2 LSB
T
A
@ T
MIN
to T
MAX
±1 ±1 ±1 LSB
Gain Error
2
±0.1 ±0.3 ±0.1 ± 0.1 %FSR
3
Offset Error
2
±0.05 ±0.15 ±0.05 ±0.05 %FSR
3
Temperature Range for Guaranteed
Monotonicity 0 +70 0 +70 –25 +85 °C
DRIFT (T
MIN
to T
MAX
)
Total Bipolar Drift, max (includes gain,
offset, and linearity drifts) ±20 ppm of FSR/°C
Total Error (T
MIN
to T
MAX
)
4
Unipolar ±0.08 ±0.15 % of FSR
Bipolar ±0.06 ±0.10 % of FSR
Gain
Including Internal Reference ±15 ±30 ±20 ±20 ppm of FSR/°C
Excluding Internal Reference ±5 ±7 ± 10 ± 10 ppm of FSR/°C
Unipolar Offset ±1 ±3 ±1 ±1 ppm of FSR/°C
Bipolar Offset ±5 ±10 ±10 ±10 ppm of FSR/°C
CONVERSION SPEED
Voltage Model (V)
5
Settling Time to ±0.01% of FSR for
FSR Change (2 kΩ储500 pF load)
with 10 kΩ Feedback 5 5 5 µs
with 5 kΩ Feedback 3 3 3 µs
For LSB Change 1.5 1.5 1.5 µs
Slew Rate 10 15 20 20 V/µs
Current Model (I)
Settling time to ±0.01% of FSR for
FSR Change
10 Ω to 100 Ω Load 300 300 300 ns
for 1 kΩ 111µs