Datasheet

ADCLK944
Rev. 0 | Page 11 of 12
INPUT TERMINATION OPTIONS
V
REF
V
CC
V
T
CLK
CLK
V
REF
V
T
CONNECT V
T
TO V
CC
.
08770-019
50Ω50Ω
Figure 18. Interfacing to CML Inputs
V
REF
V
T
CONNECT V
T
TO V
CC
− 2V.
V
CC
– 2V
50Ω50Ω
CLK
CLK
08770-020
Figure 19. Interfacing to PECL Inputs
CONNECT V
T
TO V
REF
.
50Ω50Ω
CLK
CLK
08770-021
V
REF
V
T
Figure 20. AC Coupling Differential Signal Inputs, Such as LVDS
C
ONNECT V
T
, V
REF
, AND CLK TOGETHER.
PLACE A BYPASS CAPACITOR FROM V
T
TO
G
ROUND.
A
LTERNATIVELY, V
T
, V
REF
, AND CLK CAN BE
C
ONNECTED TOGETHER, GIVING A CLEANE
LAY
50Ω50Ω
CLK
CLK
08770-022
R
OUT AND A 180° PHASE SHIFT.
Figure 21. Interfacing to AC-Coupled, Single-Ended Inputs