Datasheet

ADCLK846
Rev. B | Page 9 of 16
900
400
500
600
700
800
100 200 300 400 500 600 700 800 900
1000 1100 1200 1300 1400 1500 1600 1700
DIFFERENTIAL OUTPUT SWING (mV p-p)
INPUT FREQUENCY (MHz)
07226-009
Figure 9. LVDS Differential Output Swing vs. Input Frequency
150
125
100
75
50
25
0
0 200 400 600 800 1000 1200 1400 1600 1800
CURRENT (mA)
FREQUENCY (MHz)
07226-110
Figure 10. LVDS Current vs. Frequency, All Banks Set to LVDS
500
450
400
350
300
250
200
150
100
50
0
022.01.51.00.5
JITTER (f
S
rms)
INPUT SLEW RATE (V/ns)
.5
07226-011
Figure 11. Additive Broadband Jitter vs. Input Slew Rate
–
80
–90
–100
–110
–120
–130
–140
–150
–160
–170
–180
10 100M10M1M100k10k1k100
PHASE NOISE (dBc/Hz)
FREQUENCY OFFSET (Hz)
ABSOLUTE PHASE NOISE MEASURED @ 1GHz WITH AGILENT
E5052 USING WENZEL CLOCK SOURCE CONSISTING OF A
WENZEL 100MHz CRYSTAL OSCILLATOR (P/N 500-06672),
WENZEL 5× MULTIPLIER (P/N LNOM-100-5-13-14-F-A), AND A
WENZEL 2× MULTIPLIER (P/N LNDD-500-14-14-1-D).
07226-112
CLOCK SOURCE
ADCLK846
Figure 12. Absolute Phase Noise LVDS at 1000 MHz
200
0
50
100
150
25 50 75 100 125 150 175 225200 250
CURRENT (mA)
FREQUENCY (MHz)
07226-113
BOTH BANKS CMOS
BANK A CMOS,
BANK B LVDS
BANK A LVDS,
BANK B CMOS
BOTH BANKS LVDS
Figure 13. LVDS/CMOS Current vs. Frequency with Various Logic
Combinations
55
45
46
47
48
49
50
51
52
53
54
0 50 100 150 200 250
DUTY CYCLE (%)
FREQUENCY (MHz)
07226-114
Figure 14. CMOS Output Duty Cycle vs. Frequency, 10 pF Load