Datasheet

ADCLK846
Rev. B | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Typical values are given for V
S
= 1.8 V and T
A
= 2C, unless otherwise noted. Minimum and maximum values are given over the full
V
S
= 1.8 V ± 5% and T
A
= −40°C to +85°C variations, unless otherwise noted. Input slew rate > 1 V/ns, unless otherwise noted.
Table 1.
Parameter Symbol Min Typ Max Unit Conditions
CLOCK INPUTS Differential input
Input Frequency 0 1200 MHz
Input Sensitivity, Differential 150 mV p-p
Jitter performance is improved with higher slew
rates (greater voltage swing)
Input Level 1.8 V p-p
Larger voltage swings can turn on the protection
diodes and can degrade jitter performance
Input Common-Mode Voltage V
CM
V
S
/2 − 0.1 V
S
/2 + 0.05 V Inputs are self-biased; enables ac coupling
Input Common-Mode Range V
CMR
0.4 V
S
− 0.4 V
Inputs are dc-coupled with 200 mV p-p signal
applied
Input Voltage Offset 30 mV
Input Sensitivity, Single-Ended 150 mV p-p
CLK ac-coupled; CLK
ac-bypassed to ground
Input Resistance (Differential) 7 kΩ
Input Capacitance C
IN
2 pF
Input Bias Current (Each Pin) −350 +350 µA Full input swing
LVDS CLOCK OUTPUTS
Termination = 100 Ω; differential (OUTx, OUTx
)
Output Frequency 1200 MHz See Figure 9 for a swing vs. frequency plot
Differential Output Voltage V
OD
247 344 454 mV
∆V
OD
50 mV
Offset Voltage V
OS
1.125 1.25 1.375 V
∆V
OS
50 mV
Short-Circuit Current I
S
A, I
S
B 3 6 mA Each pin (output shorted to GND )
CMOS CLOCK OUTPUTS
Single-ended; termination = open
OUTx and OUTx
in phase
Output Frequency 250 MHz
With 10 pF load each output; see Figure 16 for
swing vs. frequency
Output Voltage High V
OH
V
S
− 0.1 V At 1 mA load
V
S
− 0.35 V At 10 mA load
Output Voltage Low V
OL
0.1 V At 1 mA load
0.35 V At 10 mA load
Reference Voltage V
REF
Output Voltage V
S
/2 − 0.1 V
S
/2 V
S
/2 + 0.1 V ±500 µA
Output Resistance 60
Output Current 500 µA