Datasheet

ADAV803
Rev. A | Page 7 of 60
TIMING SPECIFICATIONS
Timing specifications are guaranteed over the full temperature and supply range.
Table 3.
Parameter Symbol Min Typ Max Unit Comments
MASTER CLOCK AND RESET
MCLKI Frequency f
MCLK
12.288 54 MHz
XIN Frequency f
XIN
27 54 MHz
RESET Low
t
RESET
20 ns
I
2
C PORT
SCL Clock Frequency f
SCL
400 kHz
SCL High t
SCLH
0.6 μs
SCL Low t
SCLL
1.3 μs
Start Condition
Setup Time t
SCS
0.6 μs Relevant for repeated start condition
Hold Time t
SCH
0.6 μs After this period, the first clock is generated
Data Setup Time t
DS
100 ns
SCL Rise Time t
SCR
300 ns
SCL Fall Time t
SCF
300 ns
SDA Rise Time t
SDR
300 ns
SDA Fall Time t
SDF
300 ns
Stop Condition
Setup Time t
SCS
0.6 μs
SERIAL PORTS
1
Slave Mode
xBCLK High t
SBH
40 ns
xBCLK Low t
SBL
40 ns
xBCLK Frequency f
SBF
64 × f
S
xLRCLK Setup t
SLS
10 ns To xBCLK rising edge
xLRCLK Hold t
SLH
10 ns From xBCLK rising edge
xSDATA Setup t
SDS
10 ns To xBCLK rising edge
xSDATA Hold t
SDH
10 ns From xBCLK rising edge
xSDATA Delay t
SDD
10 ns From xBCLK falling edge
Master Mode
xLRCLK Delay t
MLD
5 ns From xBCLK falling edge
xSDATA Delay t
MDD
10 ns From xBCLK falling edge
xSDATA Setup t
MDS
10 ns From xBCLK rising edge
xSDATA Hold t
MDH
10 ns From xBCLK rising edge
1
The prefix x refers to I-, O-, IAUX-, or OAUX- for the full pin name.
TEMPERATURE RANGE
Table 4.
Parameter Min Typ Max Unit
Specifications Guaranteed 25 °C
Functionality Guaranteed −40 +85 °C
Storage −65 +150 °C