Datasheet
ADAV801
Rev. A | Page 9 of 60
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC
VOUTL
NC
VOUTR
OAUXSDATA
IAUXLRCLK
IAUXBCLK
IAUXSDATA
Z
EROL/INT
ZEROR
DVDD
DGND
ADVDD
ADGND
PLL_LF2
PLL_LF1
PLL_GND
PLL_VDD
DGND
SYSCLK1
SYSCLK2
SYSCLK3
XIN
XOUT
39
38
37
41
40
MCLKO
MCLKI
DVDD
DGND
36
35
34
33
42
43
44
45
46
47
48
17 18 19 20 21 22 23 24
ILRCLK
IBCLK
ISDATA
OLRCLK
OBCLK
OSDATA
DIRIN
ODVDD
ODGND
DITOUT
OAUXLRCLK
OAUXBCLK
1
2
3
4
5
6
7
8
9
10
11
12
64 63 62 61 60 59 58
CAPLN
CAPLP
AGND
CAPRP
CAPRN
AVDD
AGND
VREF
AGND
FILTD
AGND
AVDD
VINR
VINL
AGND
AVDD
DIR_LF
DIR_GND
DIR_VDD
RESET
CLATCH
CIN
CCLK
COUT
13
14
15
16
25 26 27 31302928 32
57 56 55 54 53 52 51 50 49
ADAV801
TOP VIEW
(Not to Scale)
04577-002
PIN 1
INDICATOR
NC = NO CONNECT
Figure 2. ADAV801 Pin Configuration
Table 6. Pin Function Descriptions
Pin No. Mnemonic I/O Description
1 VINR I Analog Audio Input, Right Channel.
2 VINL I Analog Audio Input, Left Channel.
3 AGND Analog Ground.
4 AVDD Analog Voltage Supply.
5 DIR_LF DIR Phase-Locked Loop (PLL) Filter Pin.
6 DIR_GND Supply Ground for DIR Analog Section. This pin should be connected to AGND.
7 DIR_VDD Supply for DIR Analog Section. This pin should be connected to AVDD.
8
RESET
I Asynchronous Reset Input (Active Low).
9 CLATCH I Chip Select (Control Latch) Pin of SPI-Compatible Control Interface.
10 CIN I Data Input of SPI-Compatible Control Interface.
11 CCLK I Clock Input of SPI-Compatible Control Interface.
12 COUT O Data Output of SPI-Compatible Control Interface.
13 ZEROL/INT O
Left Channel (Output) Zero Flag or Interrupt (Output) Flag. The function of this pin is determined
by the INTRPT bit in DAC Control Register 4.
14 ZEROR O Right Channel (Output) Zero Flag.
15 DVDD Digital Voltage Supply.
16 DGND Digital Ground.
17 ILRCLK I/O Sampling Clock (LRCLK) of Playback Digital Input Port.
18 IBCLK I/O Serial Clock (BCLK) of Playback Digital Input Port.
19 ISDATA I Data Input of Playback Digital Input Port.
20 OLRCLK I/O Sampling Clock (LRCLK) of Record Digital Output Port.
21 OBCLK I/O Serial Clock (BCLK) of Record Digital Output Port.
22 OSDATA O Data Output of Record Digital Output Port.
23 DIRIN I Input to Digital Input Receiver (S/PDIF).
24 ODVDD Interface Digital Voltage Supply.
25 ODGND Interface Digital Ground.
26 DITOUT O S/PDIF Output from DIT.