Datasheet

ADAU1772 Data Sheet
Rev. B | Page 80 of 116
Table 65. Bit Descriptions for PGA_CONTROL_1
Bits Bit Name Settings Description Reset Access
7 PGA_EN1 Select line or microphone input. Note that the PGA inverts the signal
going through it.
0x0 RW
0 AIN1 used as a single-ended line input. PGA powered down.
1 AIN1 used as a single-ended microphone input. PGA powered up with
slewing.
6 PGA_MUTE1 Enable PGA1 mute. When PGA is muted, PGA_GAIN1 is ignored. 0x1 RW
0 Unmuted
1 Muted
[5:0] PGA_GAIN1 Set the gain of PGA1. 0x0 RW
000000 −12 dB
000001 −11.25 dB
010000 0 dB
111110 +34.5 dB
111111 +35.25 dB
PGA CONTROL 2 REGISTER
Address: 0x0025, Reset: 0x40, Name: PGA_CONTROL_2
This register controls the PGA connected to AIN2.
Table 66. Bit Descriptions for PGA_CONTROL_2
Bits
Bit Name
Settings
Description
Reset
Access
7 PGA_EN2 Select line or microphone input. Note that the PGA inverts the signal
going through it.
0x0 RW
0 AIN2 used as a single-ended line input. PGA powered down.
1 AIN2 used as a single-ended microphone input. PGA powered up with
slewing.
6 PGA_MUTE2 Enable PGA2 mute. When PGA is muted, PGA_GAIN2 is ignored. 0x1 RW
0 Unmuted
1 Muted
[5:0] PGA_GAIN2 Set the gain of PGA2. 0x0 RW
000000 −12 dB
000001 −11.25 dB
010000 0 dB
111110
+34.5 dB
111111 +35.25 dB