Datasheet

ADAU1772 Data Sheet
Rev. B | Page 70 of 116
Table 52. Bit Descriptions for ADC_SDATA_CH
Bits Bit Name Settings Description Reset Access
[3:2] ADC_SDATA1_ST SDATA1 output channel output select. Selects the output channel at which
ADC_SDATA1 starts to output data. The output port sequentially outputs
data following this start channel according to the setting of Bit SAI.
0x1 RW
00 Channel 0
01 Channel 2
10 Channel 4
11 Channel 6
[1:0] ADC_SDATA0_ST SDATA0 output channel output select. Selects the output channel at which
ADC_SDATA0 starts to output data. The output port sequentially outputs
data following this start channel according to the setting of Bit SAI.
0x0 RW
00 Channel 0
01 Channel 2
10 Channel 4
11 Channel 6
OUTPUT ASRC0/OUTPUT ASRC1 SOURCE REGISTER
Address: 0x0018, Reset: 0x10, Name: ASRCO_SOURCE_0_1
Table 53. Bit Descriptions for ASRCO_SOURCE_0_1
Bits Bit Name Settings Description Reset Access
[7:4] ASRC_OUT_SOURCE1 Output ASRC Channel 1 source select. 0x1 RW
0000 Core Output 0
0001 Core Output 1
0010 Core Output 2
0011 Core Output 3
0100 ADC0
0101 ADC1
0110 ADC2
0111 ADC3
1000
Serial Input 0
1001 Serial Input 1
1010 Serial Input 2