Datasheet

ADAU1772 Data Sheet
Rev. B | Page 106 of 116
Table 97. Bit Descriptions for BIAS_CONTROL0
Bits Bit Name Settings Description Reset Access
[7:6] HP_IBIAS Headphone output bias current setting. Higher bias currents result in
higher performance.
0x0 RW
00 Normal operation (default)
01 Extreme power saving
10 Enhanced performance
11 Power saving
[5:4] AFE_IBIAS01 Analog Front-End 0 and Analog Front-End 1 bias current setting. Higher
bias currents result in higher performance.
0x0 RW
00 Normal operation (default)
01 Extreme power saving
10 Enhanced performance
11 Power saving
[3:2] ADC_IBIAS23 ADC2 and ADC3 bias current setting. Higher bias currents result in higher
performance.
0x0 RW
00 Normal operation (default)
01 Reserved
10 Enhanced performance
11 Power saving
[1:0] ADC_IBIAS01 ADC0 and ADC1 bias current setting. Higher bias currents result in higher
performance.
0x0 RW
00 Normal operation (default)
01 Reserved
10
Enhanced performance
11
Power saving
ANALOG BIAS CONTROL 1 REGISTER
Address: 0x0047, Reset: 0x00, Name: BIAS_CONTROL1
Table 98. Bit Descriptions for BIAS_CONTROL1
Bits Bit Name Settings Description Reset Access
6
CBIAS_DIS
Central analog bias circuitry. Higher bias currents result in higher
performance.
0x0
RW
0 Powered up
1 Powered down