Datasheet

ADAU1761

Rev. C | Page 81 of 92

R48 to R51: GPIO Pin Control, 16,582 to 16,585 (0x40C6 to 0x40C9)

The GPIO pin control register sets the functionality of each GPIO pin as shown in Tabl e 79. The GPIO functions use the same pins as the

serial port and must be enabled in the serial data/GPIO pin configuration register (Address 0x40F4). When the GPIO pins are set to

C/SPI port control mode, the pins are set through writes to memory locations described in Table 32 . The value of the optional internal

pull-up is nominally 250 k.

The output CRC error and output watchdog error settings are sticky, that is, once set, they remain set until the ADAU1761 is reset.

Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

0x40C6 Reserved GPIO0[3:0]

0x40C7 Reserved GPIO1[3:0]

0x40C8 Reserved GPIO2[3:0]

0x40C9 Reserved GPIO3[3:0]

Table 79. GPIO Pin Functionality Bit Settings

GPIOx[3:0] Bits GPIO Pin Function

0000 Input without debounce (default)

0001 Input with debounce (0.3 ms)

0010 Input with debounce (0.6 ms)

0011 Input with debounce (0.9 ms)

0100 Input with debounce (5 ms)

0101 Input with debounce (10 ms)

0110 Input with debounce (20 ms)

0111 Input with debounce (40 ms)

1000 Input controlled by I

C/SPI port

1001 Output set by I

C/SPI port, with pull-up

1010 Output set by I

C/SPI port, no pull-up

1011 Output set by DSP core, with pull-up

1100 Output set by DSP core, no pull-up

1101 Reserved

1110 Output CRC error (sticky)

1111 Output watchdog error (sticky)

Table 80. GPIO Pin Control Registers

Address

Decimal Hex

Bit Name Description

R48 16,582 0x40C6 GPIO0[3:0] GPIO 0 pin function (see Table 79)

R49 16,583 0x40C7 GPIO1[3:0] GPIO 1 pin function (see Table 79)

R50 16,584 0x40C8 GPIO2[3:0] GPIO 2 pin function (see Table 79)

R51 16,585 0x40C9 GPIO3[3:0] GPIO 3 pin function (see Table 79)