Datasheet

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Table Of Contents

FEATURES
APPLICATIONS
GENERAL DESCRIPTION
TABLE OF CONTENTS
REVISION HISTORY
FUNCTIONAL BLOCK DIAGRAM
SPECIFICATIONS
- ANALOG PERFORMANCE
- DIGITAL INPUT/OUTPUT
- POWER
- TEMPERATURE RANGE
- PLL AND OSCILLATOR
- REGULATOR
- DIGITAL TIMING SPECIFICATIONS
  - Digital Timing Diagrams
ABSOLUTE MAXIMUM RATINGS
- THERMAL RESISTANCE
- ESD CAUTION
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
TYPICAL PERFORMANCE CHARACTERISTICS
SYSTEM BLOCK DIAGRAM
THEORY OF OPERATION
INITIALIZATION
- POWER-UP SEQUENCE
- CONTROL REGISTERS SETUP
  - DSP Core Control Register (Address 2076)
  - DAC Setup Register (Address 2087)
- RECOMMENDED PROGRAM/PARAMETER LOADING PROCEDURE
- POWER REDUCTION MODES
- USING THE OSCILLATOR
- SETTING MASTER CLOCK/PLL MODE
- VOLTAGE REGULATOR
AUDIO ADCs
AUDIO DACs
CONTROL PORTS
- I2C PORT
  - Addressing
  - I2C Read and Write Operations
- SPI PORT
- SELF-BOOT
  - EEPROM Format
  - Writeback
SIGNAL PROCESSING
- NUMERIC FORMATS
  - Numerical Format: 5.23
- PROGRAMMING
RAMS AND REGISTERS
- ADDRESS MAPS
- PARAMETER RAM
  - Direct Read/Write
  - Safeload Write
- DATA RAM
- READ/WRITE DATA FORMATS
CONTROL REGISTER MAP
CONTROL REGISTER DETAILS
- 2048 TO 2055 (0x0800 TO 0x0807)—INTERFACE REGISTERS
- 2056 (0x0808)—GPIO PIN SETTING REGISTER
- 2057 TO 2060 (0x0809 TO 0x080C)—AUXILIARY ADC DATA REGISTERS
- 2064 TO 2068 (0x0810 TO 0x0814)—SAFELOAD DATA REGISTERS
- 2069 TO 2073 (0x0815 TO 0x819)—SAFELOAD ADDRESS REGISTERS
- 2074 TO 2075 (0x081A TO 0x081B)—DATA CAPTURE REGISTERS
- 2076 (0x081C)—DSP CORE CONTROL REGISTER
- 2078 (0x081E)—SERIAL OUTPUT CONTROL REGISTER
- 2079 (0x081F)—SERIAL INPUT CONTROL REGISTER
- 2080 TO 2081 (0x0820 TO 0x0821)—MULTIPURPOSE PIN CONFIGURATION REGISTERS
- 2082 (0x0822)—AUXILIARY ADC AND POWER CONTROL
- 2084 (0x0824)—AUXILIARY ADC ENABLE
- 2086 (0x0826)—OSCILLATOR POWER-DOWN
- 2087 (0x0827)—DAC SETUP
MULTIPURPOSE PINS
- AUXILIARY ADC
- GENERAL-PURPOSE INPUT/OUTPUT PINS
- SERIAL DATA INPUT/OUTPUT PORTS
LAYOUT RECOMMENDATIONS
- PARTS PLACEMENT
- GROUNDING
TYPICAL APPLICATION SCHEMATICS
- SELF-BOOT MODE
- I2C CONTROL
- SPI CONTROL
OUTLINE DIMENSIONS
- ORDERING GUIDE

Data Sheet ADAU1701

Rev. C | Page 43 of 52

2082 (0x0822)—AUXILIARY ADC AND POWER CONTROL

Table 54. Auxiliary ADC and Power Control Bit Map

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default

RSVD

FIL1

FIL0

AAPD

VBPD

VRPD

RSVD

D0PD

D1PD

D2PD

D3PD

0x0000

Table 55.

Bit Name Description

FIL[1:0] Auxiliary ADC filtering

FIL[1:0] Setting

00 4-bit hysteresis (12-bit level)

01 5-bit hysteresis (12-bit level)

Filter and hysteresis bypassed

11 Low-pass filter bypassed

AAPD ADC power-down (both ADCs)

VBPD

Voltage reference buffer power-down

VRPD Voltage reference power-down

D0PD DAC0 power-down

D1PD DAC1 power-down

D2PD DAC2 power-down

D3PD DAC3 power-down

2084 (0x0824)—AUXILIARY ADC ENABLE

Table 56. Auxiliary ADC Enable Bit Map

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default

AAEN RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD 0x0000

Table 57.

Bit Name Description

AAEN Enable the auxiliary ADC

2086 (0x0826)—OSCILLATOR POWER-DOWN

Table 58. Oscillator Power-Down Bit Map

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default

RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD OPD RSVD RSVD 0x0000

Table 59.

Bit Name Description

OPD Oscillator Power Down. Power down the oscillator.