Datasheet

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Table Of Contents

FEATURES
APPLICATIONS
GENERAL DESCRIPTION
TABLE OF CONTENTS
REVISION HISTORY
FUNCTIONAL BLOCK DIAGRAM
SPECIFICATIONS
- ANALOG PERFORMANCE
- DIGITAL INPUT/OUTPUT
- POWER
- TEMPERATURE RANGE
- PLL AND OSCILLATOR
- REGULATOR
- DIGITAL TIMING SPECIFICATIONS
  - Digital Timing Diagrams
ABSOLUTE MAXIMUM RATINGS
- THERMAL RESISTANCE
- ESD CAUTION
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
TYPICAL PERFORMANCE CHARACTERISTICS
SYSTEM BLOCK DIAGRAM
THEORY OF OPERATION
INITIALIZATION
- POWER-UP SEQUENCE
- CONTROL REGISTERS SETUP
  - DSP Core Control Register (Address 2076)
  - DAC Setup Register (Address 2087)
- RECOMMENDED PROGRAM/PARAMETER LOADING PROCEDURE
- POWER REDUCTION MODES
- USING THE OSCILLATOR
- SETTING MASTER CLOCK/PLL MODE
- VOLTAGE REGULATOR
AUDIO ADCs
AUDIO DACs
CONTROL PORTS
- I2C PORT
  - Addressing
  - I2C Read and Write Operations
- SPI PORT
- SELF-BOOT
  - EEPROM Format
  - Writeback
SIGNAL PROCESSING
- NUMERIC FORMATS
  - Numerical Format: 5.23
- PROGRAMMING
RAMS AND REGISTERS
- ADDRESS MAPS
- PARAMETER RAM
  - Direct Read/Write
  - Safeload Write
- DATA RAM
- READ/WRITE DATA FORMATS
CONTROL REGISTER MAP
CONTROL REGISTER DETAILS
- 2048 TO 2055 (0x0800 TO 0x0807)—INTERFACE REGISTERS
- 2056 (0x0808)—GPIO PIN SETTING REGISTER
- 2057 TO 2060 (0x0809 TO 0x080C)—AUXILIARY ADC DATA REGISTERS
- 2064 TO 2068 (0x0810 TO 0x0814)—SAFELOAD DATA REGISTERS
- 2069 TO 2073 (0x0815 TO 0x819)—SAFELOAD ADDRESS REGISTERS
- 2074 TO 2075 (0x081A TO 0x081B)—DATA CAPTURE REGISTERS
- 2076 (0x081C)—DSP CORE CONTROL REGISTER
- 2078 (0x081E)—SERIAL OUTPUT CONTROL REGISTER
- 2079 (0x081F)—SERIAL INPUT CONTROL REGISTER
- 2080 TO 2081 (0x0820 TO 0x0821)—MULTIPURPOSE PIN CONFIGURATION REGISTERS
- 2082 (0x0822)—AUXILIARY ADC AND POWER CONTROL
- 2084 (0x0824)—AUXILIARY ADC ENABLE
- 2086 (0x0826)—OSCILLATOR POWER-DOWN
- 2087 (0x0827)—DAC SETUP
MULTIPURPOSE PINS
- AUXILIARY ADC
- GENERAL-PURPOSE INPUT/OUTPUT PINS
- SERIAL DATA INPUT/OUTPUT PORTS
LAYOUT RECOMMENDATIONS
- PARTS PLACEMENT
- GROUNDING
TYPICAL APPLICATION SCHEMATICS
- SELF-BOOT MODE
- I2C CONTROL
- SPI CONTROL
OUTLINE DIMENSIONS
- ORDERING GUIDE

Data Sheet ADAU1701

Rev. C | Page 33 of 52

MSB LSB

Address of D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20 D19 D18 D17 D16

Hex Dec Bytes Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default

0x0820 2080 3 MP Pin Config. 0[23:16] MP53 MP52 MP51 MP50 MP43 MP42 MP41 MP40 0x00

MP Pin Config. 0[15:0] MP33 MP32 MP31 MP30 MP23 MP22 MP21 MP20 MP13 MP12 MP11 MP10 MP03 MP02 MP01 MP00 0x0000

0x0821 2081 3 MP Pin Config. 1[23:16] MP113 MP112 MP111 MP110 MP103 MP102 MP101 MP100 0x00

MP Pin Config. 1[15:0] MP93 MP92 MP91 MP90 MP83 MP82 MP81 MP80 MP73 MP72 MP71 MP70 MP63 MP62 MP61 MP60 0x0000

0x0822 2082 2 Auxiliary ADC and power RSVD RSVD RSVD RSVD RSVD RSVD FIL1 FIL0 AAPD VBPD VRPD RSVD D0PD D1PD D2PD D3PD 0x0000

control

0x0823 2083 2 Reserved RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD 0x0000

0x0824 2084 2 Auxiliary ADC enable AAEN RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD 0x0000

0x0825 2085 2 Reserved RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD 0x0000

0x0826 2086 2 Oscillator power-down RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD OPD RSVD RSVD 0x0000

0x0827 2087 2 DAC setup RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD DS1 DS0 0x0000

Shading indicates that registers do not fill these locations, so control bits do not exist in these locations.