Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- GENERAL DESCRIPTION
- TABLE OF CONTENTS
- REVISION HISTORY
- FUNCTIONAL BLOCK DIAGRAM
- SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
- TYPICAL PERFORMANCE CHARACTERISTICS
- SYSTEM BLOCK DIAGRAM
- THEORY OF OPERATION
- INITIALIZATION
- AUDIO ADCs
- AUDIO DACs
- CONTROL PORTS
- SIGNAL PROCESSING
- RAMS AND REGISTERS
- CONTROL REGISTER MAP
- CONTROL REGISTER DETAILS
- 2048 TO 2055 (0x0800 TO 0x0807)—INTERFACE REGISTERS
- 2056 (0x0808)—GPIO PIN SETTING REGISTER
- 2057 TO 2060 (0x0809 TO 0x080C)—AUXILIARY ADC DATA REGISTERS
- 2064 TO 2068 (0x0810 TO 0x0814)—SAFELOAD DATA REGISTERS
- 2069 TO 2073 (0x0815 TO 0x819)—SAFELOAD ADDRESS REGISTERS
- 2074 TO 2075 (0x081A TO 0x081B)—DATA CAPTURE REGISTERS
- 2076 (0x081C)—DSP CORE CONTROL REGISTER
- 2078 (0x081E)—SERIAL OUTPUT CONTROL REGISTER
- 2079 (0x081F)—SERIAL INPUT CONTROL REGISTER
- 2080 TO 2081 (0x0820 TO 0x0821)—MULTIPURPOSE PIN CONFIGURATION REGISTERS
- 2082 (0x0822)—AUXILIARY ADC AND POWER CONTROL
- 2084 (0x0824)—AUXILIARY ADC ENABLE
- 2086 (0x0826)—OSCILLATOR POWER-DOWN
- 2087 (0x0827)—DAC SETUP
- MULTIPURPOSE PINS
- LAYOUT RECOMMENDATIONS
- TYPICAL APPLICATION SCHEMATICS
- OUTLINE DIMENSIONS
Data Sheet ADAU1701
Rev. C | Page 21 of 52
AUDIO DACs
The ADAU1701 includes four Σ-Δ DACs. The SNR of the DAC
is 104 dB, and the THD + N is −90 dB. A full-scale output on
the DACs is 0.9 V rms (2.5 V p-p).
The DACs are in an inverting configuration. If a signal inversion
from input to output is undesirable, it can be reversed either by
using an inverting configuration for the output filter or by simply
inverting the signal in the SigmaDSP program flow.
The DAC outputs can be filtered with either an active or a
passive reconstruction filter. A single-pole, passive, low-pass
filter with a 50 kHz corner frequency, as shown in Figure 18,
is sufficient to filter the DAC out-of-band noise, although an
active filter may provide better audio performance. Figure 19
shows a triple-pole, active, low-pass filter that provides a steeper
roll-off and better stop band attenuation than the passive filter.
In this configuration, the V+ and V− pins of the AD8606 op
amp are set to AVDD and ground, respectively.
To properly initialize the DACs, the DS[1:0] bits in the DAC
setup register (Address 2087) should be set to 01.
47µF
+
560Ω
DAC_OUT
5.6nF
FILTER_OUT
06412-018
Figure 18. Passive DAC Output Filter
47µF
+
604Ω
DAC_OUT
49.9kΩ
3.3nF
FILTER_OUT
4.75kΩ
4.75kΩ
150pF
AD8606
C8
470pF
06412-019
Figure 19. Active DAC Output Filter










