Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- GENERAL DESCRIPTION
- TABLE OF CONTENTS
- REVISION HISTORY
- FUNCTIONAL BLOCK DIAGRAM
- SPECIFICATIONS
- ABSOLUTE MAXIMUM RATINGS
- PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
- TYPICAL PERFORMANCE CHARACTERISTICS
- SYSTEM BLOCK DIAGRAM
- THEORY OF OPERATION
- INITIALIZATION
- AUDIO ADCs
- AUDIO DACs
- CONTROL PORTS
- SIGNAL PROCESSING
- RAMS AND REGISTERS
- CONTROL REGISTER MAP
- CONTROL REGISTER DETAILS
- 2048 TO 2055 (0x0800 TO 0x0807)—INTERFACE REGISTERS
- 2056 (0x0808)—GPIO PIN SETTING REGISTER
- 2057 TO 2060 (0x0809 TO 0x080C)—AUXILIARY ADC DATA REGISTERS
- 2064 TO 2068 (0x0810 TO 0x0814)—SAFELOAD DATA REGISTERS
- 2069 TO 2073 (0x0815 TO 0x819)—SAFELOAD ADDRESS REGISTERS
- 2074 TO 2075 (0x081A TO 0x081B)—DATA CAPTURE REGISTERS
- 2076 (0x081C)—DSP CORE CONTROL REGISTER
- 2078 (0x081E)—SERIAL OUTPUT CONTROL REGISTER
- 2079 (0x081F)—SERIAL INPUT CONTROL REGISTER
- 2080 TO 2081 (0x0820 TO 0x0821)—MULTIPURPOSE PIN CONFIGURATION REGISTERS
- 2082 (0x0822)—AUXILIARY ADC AND POWER CONTROL
- 2084 (0x0824)—AUXILIARY ADC ENABLE
- 2086 (0x0826)—OSCILLATOR POWER-DOWN
- 2087 (0x0827)—DAC SETUP
- MULTIPURPOSE PINS
- LAYOUT RECOMMENDATIONS
- TYPICAL APPLICATION SCHEMATICS
- OUTLINE DIMENSIONS
ADAU1701 Data Sheet
Rev. C | Page 20 of 52
AUDIO ADCs
The ADAU1701 has two Σ-Δ ADCs. The signal-to-noise ratio
(SNR) of the ADCs is 100 dB, and the THD + N is −83 dB.
The stereo audio ADCs are current input; therefore, a voltage-
to-current resistor is required on the inputs. This means that
the voltage level of the input signals to the system can be set to
any level; only the input resistors need to be scaled to provide
the proper full-scale current input. The ADC0 and ADC1 input
pins, as well as ADC_RES, have an internal 2 kΩ resistor for
ESD protection. The voltage seen directly on the ADC input
pins is the 1.5 V common mode.
The external resistor connected to ADC_RES sets the full-scale
current input of the ADCs. The full range of the ADC inputs is
100 µA rms with an external 18 kΩ resistor on ADC_RES (20 kΩ
total, because it is in series with the internal 2 kΩ). The only
reason to change the ADC_RES resistor is if a sampling rate
other than 48 kHz is used.
The voltage-to-current resistors connected to ADC0/ADC1 set
the full-scale voltage input of the ADCs. With a full-scale current
input of 100 µA rms
,
a 2.0 V rms signal with an external 18 kΩ
resistor (in series with the 2 kΩ internal resistor) results in an
input using the full range of the ADC. The matching of these
resistors to the ADC_RES resistor is important to the operation
of the ADCs. For these three resistors, a 1% tolerance is
recommended.
Either the ADC0 and/or ADC1 input pins can be left
unconnected if that channel of the ADC is unused.
These calculations of resistor values assume a 48 kHz sample
rate. The recommended input and current setting resistors
scale linearly with the sample rate because the ADCs have a
switched-capacitor input. The total value (2 kΩ internal plus
external resistor) of the ADC_RES resistor with sample rate
f
S_NEW
can be calculated as follows:
NEWS
total
f
R
_
000,
48
kΩ20
×=
The values of the resistors (internal plus external) in series with
the ADC0 and ADC1 pins can be calculated as follows:
NEWS
TotalInput
f
VoltageInputrmsR
_
000,48
kΩ10)( ××=
Table 13 lists the external and total resistor values for common
signal input levels at a 48 kHz sampling rate. A full-scale rms
input voltage of 0.9 V is shown in the table because a full-scale
signal at this input level is equal to a full-scale output on the DACs.
Table 13. ADC Input Resistor Values
Full-Scale
RMS Input
Voltage (V)
ADC_RES
Value (kΩ)
ADC0/ADC1
Resistor
Value (kΩ)
Total ADC0/ADC1
Input Resistance
(External +
Internal) (kΩ)
0.9 18 7 9
1.0
18
8
10
2.0 18 18 20
Figure 17 shows a typical configuration of the ADC inputs for
a 2.0 V rms input signal for a f
S
of 48 kHz. The 47 μF capacitors are
used to ac-couple the signals so that the inputs are biased at 1.5 V.
ADC1
ADC0
ADC_RES
18kΩ
47µF
18k
Ω
47µF
18k
Ω
ADAU1701
06412-017
Figure 17. Audio ADC Input Configuration










