Datasheet

ADAU1381

Rev. B | Page 60 of 84

Bits[1:0], On-Chip ADC Data Selection in TDM Mode

These bits set the position of the ADC output channels on a TDM

stream. In TDM 4 mode, valid settings are first pair or second

pair. In TDM 8 mode, valid settings are first pair, second pair,

third pair, or fourth pair. These bits should be set in conjunction

with Register 16406 (0x4016), Serial Port Control 1, Bit 4, ADC

channel position in TDM, to select where the data should appear

in the TDM stream.

Figure 68, Figure 69, and Figure 70 show examples of different

TDM settings.

Table 43. Converter Control 1 Register

Bits Description Default

[7:2] Reserved

[1:0] On-chip ADC data selection in TDM mode 00

00: first pair

01: second pair

10: third pair

11: fourth pair