Datasheet

ADAU1381

Rev. B | Page 48 of 84

RECORD PATH CONFIGURATION

Analog Beep Control

This register controls the digital microphone settings and the

analog beep input gain.

Bits[5:4], Digital Microphone Enable

These bits control the enable function for the stereo digital

microphones. The analog front end is powered down when

using a digital microphone.

Bit 3, Beep Input Mute

This bit mutes the beep input.

Bits[2:0], Beep Input Gain

This bit controls the gain setting for the analog beep input; it

defaults at 0 dB and can be set as high as 32 dB. The beep signal

must be enabled in Register 16400 (0x4010), microphone bias

control and beep enable.

Table 35. Digital Microphone and Analog Beep Control Register

Bits Description Default

[7:6] Reserved

[5:4] Digital microphone enable 00

00: disabled

01: MICD1 enabled

10: MICD2 enabled

11: reserved

3 Beep input mute 0

0: muted

1: unmuted

[2:0] Beep input gain. Note that Setting 100 sets the input beep gain to −23 dB. 000

000: 0 dB

001: +6 dB

010: +10 dB

011: +14 dB

100: −23 dB

101: +20 dB

110: +26 dB

111: +32 dB