Datasheet

ADAU1361
Rev. C | Page 47 of 80
Byte Bits Bit Name Description
4 [6:3] R[3:0] PLL integer setting.
Setting Value of R
0010 2 (default)
0011 3
0100
4
0101
5
0110
6
0111
7
1000
8
4 [2:1] X[1:0] PLL input clock divider.
Setting Value of X
00 1 (default)
01 2
10
3
11
4
4 0 Type Type of PLL. When set to integer mode, the values of M and N are ignored.
0 = integer (default).
1 = fractional.
5 1 Lock PLL lock. This read-only bit is flagged when the PLL has finished locking.
0 = PLL unlocked (default).
1 = PLL locked.
5 0 PLLEN
PLL enable.
0 = PLL disabled (default).
1 = PLL enabled.
R2: Digital Microphone/Jack Detection Control, 16,392 (0x4008)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
JDDB[1:0] JDFUNC[1:0] Reserved JDPOL
Table 29. Digital Microphone/Jack Detection Control Register
Bits Bit Name Description
[7:6] JDDB[1:0] Jack detect debounce time.
Setting Debounce Time
00 5 ms (default)
01 10 ms
10
20 ms
11
[5:4] JDFUNC[1:0]
JACKDET/MICIN pin function. Enables or disables the jack detect function or configures the pin for a digital
microphone input.
40 ms
Setting Pin Function
00 Jack detect off (default)
01 Jack detect on
10
Digital microphone input
11
0 JDPOL Jack detect polarity. Detects high or low signal.
0 = detect high signal (default).
1 = detect low signal.
Reserved